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Interface control logic for embedding a microprocessor in a gate array

  • US 5,347,181 A
  • Filed: 04/29/1992
  • Issued: 09/13/1994
  • Est. Priority Date: 04/29/1992
  • Status: Expired due to Term
First Claim
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1. A logic circuit for providing a flexible interface between a microprocessor, an ASIC cell block and the external world, the microprocessor circuit and the ASIC cell block being located within a gate array where the microprocessor circuit is fully diffused and fixed-placed within the gate array, the logic circuit comprising a plurality of circuits for providing an interface between a plurality of microprocessor I/O pads to the ASIC cell block and to the external world, said logic circuit being fixed-placed within the gate array, said ASIC cell block being utilized to provide customer defined predetermined functions.

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