Small-size wavelet transform apparatus

• US 5,347,479 A
• Filed: 12/22/1992
• Issued: 09/13/1994
• Est. Priority Date: 12/27/1991
• Status: Expired due to Term

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Miyazaki, Takashi
• Primary Examiner(s): Smith, Jerry
• Assistant Examiner(s): Ngo, Chuong D.
• Application Number:
  US07/995,059
• Time in Patent Office: 630 Days
• Field of Search: 364/723, 364/724.1, 364/724.01, 364/724.13, 364/724.05, 364/725, 364/728.01, 364/727
• US Class Current: 708/400
• CPC Class Codes: G06F 17/148 Wavelet transforms
• CPC Class Codes: H04N 19/63 using sub-band based transform, e.g. wavelets

Abstract

In a wavelet transform apparatus including a plurality of series of delay units and at least one convolution calculating circuit to form a two-band analysis filter circuit, the two-band analysis filter circuit, i.e., the convolution calculating circuit is operated in multiplicity.

Claims

1. A wavelet transform apparatus for a one-dimensional signal, comprising:

N (N=2,3, . . . )-stages of two-band analysis filter circuits, each having a series of delay units for receiving a signal at a predetermined clock rate and a convolution calculating circuit for performing a convolution upon outputs of said delay units with predetermined high and low frequency filtering coefficients and summing them to generate high and low frequency component signals, a first stage of said two-band analysis filter circuits receiving the one-dimensional signal, the low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said two-band analysis filter circuits being input to the delay units of the (i+1)-th stage of said two-band analysis filter circuits, at least two adjacent two-band analysis filter circuits having a common convolution calculating circuit; and

first selector means, connected between the delay units of said at least two adjacent two-band analysis filter circuits and the common convolution calculating circuit thereof, for selectively connecting the outputs of the delay circuits of said at least two adjacent two-band analysis filter circuits to the common convolution calculating circuit,

thereby converting the one-dimensional signal into the high frequency component signals of the first to (N-1)-th stages of said two-band analysis filter circuits and the low frequency component signal of the N-th stage of said two-band analysis filter circuits.

2. A wavelet transform apparatus as set forth in claim 1, wherein the common convolution calculating circuit of said at least two adjacent two-band analysis filter circuits comprises:

second selector means, connected to said first selector means, for transferring output values of said first selector means by one location;

a plurality of multipliers, connected to said second selector means, for multiplying output values of said second selector means by the predetermined high frequency component coefficients and the predetermined low frequency component coefficients, selectively;

an adder, connected to said multipliers, for summing output signals of said multipliers;

a selector, connected to said adder, for switchably outputting adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into a corresponding high and low frequency component signals.

3. A wavelet transform apparatus as set forth in claim 1, wherein the common convolution calculating circuit of said at least two adjacent two-band analysis filter circuits comprises:

second selector means, connected to said first selector means, for reversing a sequence of outputs from said first selector means;

a plurality of multipliers, connected to said second selector means, for multiplying output values of said second selector means by one set of the predetermined high frequency component coefficients or the predetermined low frequency component coefficients;

an adder, connected to said multipliers, for summing and subtracting output signals of said multipliers, selectively;

a selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into a corresponding high and low frequency component signals.

4. A wavelet transform apparatus as set forth in claim 1, wherein the common convolution calculating circuit of said at least two adjacent two-band analysis filter circuits comprises:

a plurality of first multipliers, connected to said first selector means, for multiplying output values provided from said first selector means by the predetermined high frequency filtering coefficients;

a first adder, connected to said first multipliers, for summing output signals provided from said first multipliers, to generate a corresponding high frequency component signal;

a plurality of second multipliers, connected to said first selector means, for multiplying the output values provided from said first selector means by the predetermined low frequency filtering coefficients; and

a second adder, connected to said second multipliers, for summing output signals provided from said first multipliers to generate a corresponding low frequency component signal.

5. A wavelet transform apparatus for a one-dimensional signal, comprising:

a first two-band analysis filter circuit for performing a first two-band analysis filter operation upon the one-dimensional signal, said first two-band analysis filter circuit having a series of M first delay units (M=1,2, . . . ) for receiving the one-dimensional signal at a first clock rate and a first convolution calculating circuit for performing a convolution upon outputs of said first delay units with predetermined high and low frequency filtering coefficients to generate a first high frequency component signal and a first low frequency component signal; and

a second two-band analysis filter circuit, connected to said first two-band analysis filter circuit, for performing second to N-th (N=2,3, . . . ) two-band analysis filter operations upon the one-dimensional signal,

said second two-band analysis filter circuit comprising;

second to N-th series of M delay units, each of said M delay units being clocked at second to N-th clock rates, respectively;

M first selectors, connected to said second to N-th series of M delay units, each for selecting one delay unit among said second to N-th series of M delay units; and

a second convolution calculating circuit, connected to said M first selectors, for performing convolutions upon outputs from said M first selectors with the predetermined high and low frequency filtering coefficients to generate second to N-th high frequency component signals and second to N-th low frequency component signals,

said first series of M delay units receiving the one-dimensional signal, said second to N-th series of M delay units receiving the first to (N-1)-th low frequency components, respectively,

thereby converting the one-dimensional signal into the high frequency component signal of said first two-band analysis filter circuit and the second to N-th high frequency component signals and the N-th low frequency component signal of said second two-band analysis filter circuit.

6. A wavelet transform apparatus as set forth in claim 5, wherein said first convolution calculating circuit comprises:

M first multipliers, connected to said M first delay units, for multiplying output values of said M first delay units with the predetermined high frequency filtering coefficients;

a first adder, connected to said M first multipliers, for summing output signals provided from said M first multipliers to generate the first high frequency component signal;

a plurality of second multipliers, connected to said M first delay units, for multiplying the output values of said M first delay units with the predetermined low frequency filtering coefficients; and

a second adder, connected to said second multipliers, for summing output signals provided from said second multipliers to generate the first low frequency component signal.

7. A wavelet transform apparatus as set forth in claim 5, wherein said first convolution calculating circuit comprises:

M second selectors, connected to said first delay units, for transferring the output values of said first delay units by one location;

M multipliers, connected to said M second selectors for multiplying output values of said M second selectors by the predetermined high frequency component coefficients and the predetermined low frequency component coefficients, selectively;

an adder, connected to said M multipliers, for summing output signals of said M multipliers;

a third selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into the first high frequency component signal and the first low frequency component signal.

8. A wavelet transform apparatus as set forth in claim 5, wherein said first convolution calculating circuit comprises:

M second selectors, connected to said M first delay units, for reversing a sequence of outputs from said first delay units;

M multipliers, connected to said M second selectors, for multiplying output values of said M second selectors by one set of the predetermined high frequency component coefficients or the predetermined low frequency component coefficients;

an adder, connected to said M multipliers, for summing output signals of said M multipliers;

a third selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into the first high frequency component signal and the first low frequency component signal.

9. A wavelet transform apparatus as set forth in claim 5, wherein said second convolution calculating circuit comprises:

M first multipliers, connected to said M first selectors, for multiplying output values of said M first selectors by the predetermined high frequency filtering coefficients;

a first adder, connected to said M first multipliers, for summing output signals provided from said M first multipliers to generate the second to N-th high frequency component signals;

a plurality of M second multipliers, connected to said M first selectors, for multiplying the output values of said M first selectors with the predetermined low frequency filtering coefficients; and

a second adder, connected to said M second multipliers, for summing output signals provided from said M second multipliers to generate the second to N-th low frequency component signals.

10. A wavelet transform apparatus as set forth in claim 5, wherein said second convolution calculating circuit comprises:

M second selectors, connected to said M first selectors, for transferring the output values of said M first selectors by one location;

M multipliers, connected to said M second selectors, for multiplying output values of said M second selectors by the predetermined high frequency component coefficients and the predetermined low frequency component coefficients, selectively;

an adder, connected to said M multipliers, for summing output signals of said M multipliers;

a third selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into the second to N-th high frequency component signals and second to N-th low frequency component signals.

11. A wavelet transform apparatus as set forth in claim 5, wherein said second convolution calculating circuit comprises:

M second selectors, connected to said M first selectors, for reversing the outputs of said M first selectors;

M multipliers, connected to said M second selectors, for multiplying output values of said M second selectors by one set of the predetermined high frequency component coefficients or the predetermined low frequency component coefficients;

an adder, connected to said M multipliers, for summing and subtracting output signals of said M multipliers, selectively;

a third selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into the second to N-th high frequency component signals and second to N-th low frequency component signal.

12. A wavelet transform apparatus as set forth in claim 5, wherein the (i+1)-th clock rate is half of the i-th clock rate (i=1,2, . . . ).

13. A wavelet transform apparatus for a one-dimensional signal, comprising:

first to N-th (N=2,3, . . . ) series of M delay units (M=1,2, . . . ) each of said M delay units being clocked at first to N-th clock rates, respectively,

M first selectors, connected to said first to N-th series of M delay units, each for selecting one delay unit among said first to N-th series of M delay units; and

a convolution calculating circuit, connected to said M first selectors, for performing convolutions upon outputs of said M first selectors with predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients to generate first to N-th high frequency component signals and first to N-th low frequency component signals,

said first series of M delay units receiving the one-dimensional signal, said second to N-th series of M delay units receiving the first to (N-1)-th low frequency components, respectively,

thereby converting the one-dimensional signal into the first to N-th high frequency component signals and the N-th low frequency component signal.

14. A wavelet transform apparatus as set forth in claim 13, wherein said convolution calculating circuit comprises:

M first multipliers, connected to said M first selectors, for multiplying output values of said M first selectors with the predetermined high frequency filtering coefficients;

a first adder, connected to said M first multipliers, for summing output signals provided from said M first multipliers, to generate the first to N-th high frequency component signals;

M second multipliers, connected to said M first selectors, for multiplying output values of said M first selectors with the predetermined low frequency filtering coefficients; and

a second adder, connected to said M second multipliers, for summing output signals provided from said M second multipliers to generate the first to N-th low frequency component signals.

15. A wavelet transform apparatus as set forth in claim 13, wherein said convolution calculating circuit comprises:

M second selectors, connected to said M first selectors, for transferring the output values of said M first selectors by one location;

M multipliers, connected to said M second selectors, for multiplying output values of said M second selectors by the predetermined high frequency component coefficients and the predetermined low frequency component coefficients, selectively;

an adder, connected to said M multipliers, for summing output signals of said M multipliers;

a third selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into the first to N-th high frequency component signals and the first to N-th low frequency component signals.

16. A wavelet transform apparatus as set forth in claim 13, wherein said convolution calculating circuit comprises:

M second selectors, connected to said M first selectors, for reversing a sequence of the outputs of said M first selectors;

M multipliers, connected to said M second selectors, for multiplying output values of said M second selectors by one set of the predetermined high frequency component coefficients or the predetermined low frequency component coefficients;

an adder, connected to said M multipliers, for summing and subtracting output signals of said M multipliers, selectively;

a third selector, connected to said adder, for switchably outputting an adder output signal of said adder at two output terminals thereof, thereby splitting the adder output signal of said adder into the first to N-th high frequency component signals and the first to N-th low frequency component signal.

17. A wavelet transform apparatus as set forth in claim 13, wherein the (i+1)-th clock rate is half of the i-th clock rate (i=1,2, . . . ).

18. A wavelet transform apparatus for a two-dimensional input signal, comprising N(N=2,3, . . . ) stages of calculating circuits, each for performing a vertical two-band analysis filter operation upon a signal to generate a vertical high frequency component signal and a vertical low frequency component signal, performing a first horizontal two-band analysis filter operation upon the vertical high frequency component signal to generate a horizontal high vertical high frequency component signal and a horizontal low vertical high frequency component signal, and performing a second horizontal two-band analysis filter operation upon the vertical low frequency component signal to generate a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional input signal, the horizontal low vertical low frequency component signal of the i-th (i=1,2, . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the horizontal low frequency vertical low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performing convolutions upon outputs of the first delay units to generate the vertical high frequency component signal and the vertical low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the vertical high frequency component signal and the vertical low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performing convolutions upon outputs of the second delay units to generate the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal, the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal, alternately, and wherein said first convolution calculating circuit comprises;

a plurality of selectors, connected to said series of first delay units, for transferring the outputs of said first delay units by one location;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

19. A wavelet transform apparatus for a two-dimensional input signal, comprising N(N=2,3, . . . ) stages of calculating circuits, each for performing a vertical two-band analysis filter operation upon a signal to generate a vertical high frequency component signal and a vertical low frequency component signal, performing a first horizontal two-band analysis filter operation upon the vertical high frequency component signal to generate a horizontal high vertical high frequency component signal and a horizontal low vertical high frequency component signal, and performing a second horizontal two-band analysis filter operation upon the vertical low frequency component signal to generate a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional input signal, the horizontal low vertical low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the horizontal low frequency vertical low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performinq convolutions upon outputs of the first delay units to generate the vertical high frequency component signal and the vertical low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the vertical high frequency component signal and the vertical low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performing convolutions upon outputs of the second delay units to generate the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal, the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal, alternately, and wherein said first convolution calculating circuit comprises;

a plurality of selectors, connected to said first delay units, for reversing a sequence of the outputs of said series of first delay units;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

20. A wavelet transform apparatus for a two-dimensional input signal, comprising N(N=2,3, . . . ) stages of calculating circuits, each for performing a vertical two-band analysis filter operation upon a signal to generate a vertical high frequency component signal and a vertical low frequency component signal, performing a first horizontal two-band analysis filter operation upon the vertical high frequency component signal to generate a horizontal high vertical high frequency component signal and a horizontal low vertical high frequency component signal, and performing a second horizontal two-band analysis filter operation upon the vertical low frequency component signal to generate a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional input signal, the horizontal low vertical low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the horizontal low frequency vertical low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performing convolutions upon outputs of the first delay units to generate the vertical high frequency component signal and the vertical low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the vertical high frequency component signal and the vertical low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performing convolutions upon outputs of the second delay units to generate the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal, the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal, alternately, wherein said second convolution calculating circuit comprises;

a plurality of first selectors, connected to said series of second delay units, for transferring the outputs of said series of second delay units by one location;

a plurality of multipliers, connected to said series of first selectors, for multiplying output values of said series of first selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively;

an adder, connected to said multipliers, for summing output signals of said multipliers to alternately output a set of the horizontal high vertical high frequency component signal and the horizontal high vertical low frequency component signal and a set of the horizontal low vertical high frequency component signal and the horizontal low vertical low frequency component signal at its terminal; and

a selector, connected to said adder for switchably outputting a set of the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal and the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal at two output terminals of said selector.

21. A wavelet transform apparatus for a two-dimensional input signal, comprising N(N=2,3, . . . ) stages of calculating circuits, each for performing a vertical two-band analysis filter operation upon a signal to generate a vertical high frequency component signal and a vertical low frequency component signal, performing a first horizontal two-band analysis filter operation upon the vertical high frequency component signal to generate a horizontal high vertical hiqh frequency component signal and a horizontal low vertical high frequency component signal, and performing a second horizontal two-band analysis filter operation upon the vertical low frequency component signal to generate a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional input signal, the horizontal low vertical low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the horizontal low frequency vertical low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performing convolutions upon outputs of the first delay units to generate the vertical high frequency component signal and the vertical low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the vertical high frequency component signal and the vertical low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performinq convolutions upon outputs of the second delay units to generate the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal, the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal, alternately, wherein said second convolution calculating circuit comprises;

a plurality of first selectors, connected to said series of second delay units, for reversing a sequence of the outputs of said series of second delay units;

a plurality of multipliers, connected to said first selectors, for multiplying output values of said first selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients;

an adder, connected to said multipliers, for summing and subtracting output signals of said multipliers, selectively, to alternately output a set of the horizontal high vertical high frequency component signal and the horizontal high vertical low frequency component signal and a set of the horizontal low vertical high frequency component signal and the horizontal low vertical low frequency component signal at its output terminal; and

a selector, connected to said adder for switchably outputting a set of the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal and the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal at two output terminals of said selector.

22. A wavelet transform apparatus for a two-dimensional input signal, comprising N (N=2,3, . . . ) stages of calculating circuits, each for performing a horizontal two-band analysis filter operation upon a signal to generate a horizontal high frequency component signal and a horizontal low frequency component signal, performing a first vertical two-band analysis filter operation upon the horizontal high frequency component signal to generate a vertical high horizontal high frequency component signal and a vertical low horizontal high frequency component signal, and performing a second vertical two-band analysis filter operation upon the horizontal low frequency component signal to generate a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional signal, the vertical low horizontal low frequency component signal of the i-th (i=1,2, . . . , (N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the vertical low frequency horizontal low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performing convolutions upon outputs of said first delay units to generate the horizontal high frequency component signal and the horizontal low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the horizontal high frequency component signal and the horizontal low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performing convolutions upon outputs of said second delay units to generate the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal, the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal, alternately, wherein said first convolution calculating circuit comprises;

a plurality of selectors, connected to said series of first delay units, for transferring the outputs of said first delay units by one location;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

23. A wavelet transform apparatus for a two-dimensional input signal, comprising N (N=2,3, . . . ) stages of calculating circuits, each for performing a horizontal two-band analysis filter operation upon a signal to generate a horizontal high frequency component signal and a horizontal low frequency component signal, performing a first vertical two-band analysis filter operation upon the horizontal high frequency component signal to generate a vertical high horizontal high frequency component signal and a vertical low horizontal high frequency Component signal, and performing a second vertical two-band analysis filter operation upon the horizontal low frequency component signal to generate a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional signal, the vertical low horizontal low frequency component siqnal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receivinq the input signal or the vertical low frequency horizontal low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performing convolutions upon outputs of said first delay units to generate the horizontal high frequency component signal and the horizontal low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the horizontal high frequency component signal and the horizontal low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performing convolutions upon outputs of said second delay units to generate the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal, the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal, alternately, wherein said first convolution calculating circuit comprises;

a plurality of selectors, connected to said first delay units, for reversing a sequence of the outputs of said series of first delay units;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

24. A wavelet transform apparatus for a two-dimensional input signal, comprising N (N=2,3, . . . ) stages of calculating circuits, each for performing a horizontal two-band analysis filter operation upon a signal to generate a horizontal high frequency component signal and a horizontal low frequency component signal, performing a first vertical two-band analysis filter operation upon the horizontal high frequency component signal to generate a vertical high horizontal high frequency component signal and a vertical low horizontal high frequency component signal, and performing a second vertical two-band analysis filter operation upon the horizontal low frequency component signal to generate a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional signal, the vertical low horizontal low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the vertical low frequency horizontal low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performing convolutions upon outputs of said first delay units to generate the horizontal high frequency component signal and the horizontal low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the horizontal high frequency component signal and the horizontal low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuits, connected to said series of second delay units, for performing convolutions upon outputs of said second delay units to generate the vertical high horizontal high frequency component siqnal, the vertical high horizontal low frequency component signal, the vertical low horizontal hiqh frequency component signal, and the vertical low horizontal low frequency component signal, alternately, wherein said second convolution calculating circuit comprises;

a plurality of first selectors, connected to said series of second delay units, for transferring the outputs of said series of second delay units by one location;

a plurality of multipliers, connected to said series of first selectors, for multiplying output values of said series of first selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively;

an adder, connected to said multipliers, for summing output signals of said multipliers to alternately output a set of the vertical high horizontal high frequency component signal and the vertical high horizontal low frequency component signal and a set of the vertical low horizontal high frequency component signal and the vertical low horizontal low frequency component signal at an output terminal of said adder; and

a selector, connected to said adder for switchably outputting a set of the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal and the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal at two output terminals of said selector.

25. A wavelet transform apparatus for a two-dimensional input signal, comprising N (N=2,3, . . . ) of calculating circuits, each for performinq a horizontal two-band analysis filter operation upon a signal to generate a horizontal high frequency component signal and a horizontal low frequency component signal, performing a first vertical two-band analysis filter operation upon the horizontal high frequency component signal to generate a vertical high horizontal high frequency component signal and a vertical low horizontal high frequency component signal, and performing a second vertical two-band analysis filter operation upon the horizontal low frequency component signal to generate a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional signal, the vertical low horizontal low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

at least one of said N stages of calculating circuits comprising:

a series of first delay units for receiving the input signal or the vertical low frequency horizontal low frequency component signal from a pre stage calculating circuit clocked at a clock rate;

a first convolution calculating circuit, connected to said series of first delay units, for performinq convolutions upon outputs of said first delay units to generate the horizontal high frequency component signal and the horizontal low frequency component signal alternately;

a series of second delay units, connected to said first convolution circuit, for receiving the horizontal high frequency component signal and the horizontal low frequency component signal therefrom, clocked at the clock rate; and

a second convolution calculating circuit, connected to said series of second delay units, for performing convolutions upon outputs of said second delay units to generate the vertical high horizontal high frequency component signal the vertical high horizontal low frequency component signal, the vertical low horizontal high freqUenCy component signal, and the vertical low horizontal low frequency component signal, alternately;

wherein said second convolution calculating circuit comprises;

a plurality of first selectors, connected to said series of second delay units, for reversing a sequence of the outputs of said series of second delay units;

a plurality of multipliers, connected to said first selectors, for multiplying output values of said first selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients;

an adder, connected to said multipliers, for summing and-subtracting output signals of said multipliers, selectively, to alternately output a set of the vertical high horizontal high frequency component signal and the vertical high horizontal low frequency component signal and a set of the vertical low horizontal high frequency component signal and the vertical low horizontal low frequency component signal at an output terminal of said adder; and

a selector, connected to said adder for switchably outputting a set of the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal and the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal at two output terminals of said selector.

26. A wavelet transform apparatus for a two-dimensional input signal having a vertical size of X and a horizontal size of Y, comprising N (N=2,3, . . . ) stages of calculating circuits, each for performing a vertical two-band analysis filter operation upon a signal to generate a vertical high frequency component signal and a vertical low frequency component signal, performing a first horizontal two-band analysis filter operation upon the vertical high frequency component signal to generate a horizontal high vertical high frequency component signal and a horizontal low vertical high frequency component signal, and performing a second horizontal two-band analysis filter operation upon the vertical low frequency component signal to generate a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional signal, the horizontal low vertical low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+l)th stage thereof,

the i-th (i=1,2, . . . , N) stage of said calculating circuits comprising:

a series of M (M=1,2, . . . ) first delay units each having a size of X/i for receiving the input signal or the horizontal low vertical low frequency component from a pre-stage calculating circuit clocked at a first clock rate;

a series of M second delay units each having a size of 1, clocked at the first clock rate;

a convolution calculating circuit; and

a plurality of M selectors, each connected between one of said first delay units and one of said second delay units and said convolution calculating circuit, said M selectors being clocked at a clock rate twice the first clock rate;

said convolution calculating circuit receiving first output signals of said series of M first delay units to perform convolutions upon said first output signals to generate the vertical high frequency component signal and the vertical low frequency component signal alternately,

said series of M second delay units receiving the vertical high frequency component signal and the vertical low frequency component signal,

said convolution calculating circuit receiving second output signals of said series of M second delay units to perform convolutions upon said second output signals for generating the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal, the horizontal low vertical high frequency component signal, and a horizontal low vertical low frequency component signal, alternately, and splitting into the set of the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal and the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal,

the clock rate of said delay units of the (i+7)-th stage being a quarter of that of the i-th stage.

27. A wavelet transform apparatus for a two-dimensional input signal having a horizontal size of X and a vertical size of Y, comprising N (N=2,3, . . . ) stages of calculating circuits, each for performing a horizontal two-band analysis filter operation upon a signal to generate a horizontal high frequency component signal and a horizontal low frequency component signal, performing a first vertical two-band analysis filter operation upon the horizontal high frequency component signal to generate a vertical high horizontal high frequency component signal and a vertical low horizontal high frequency component signal, and performing a second vertical two-band analysis filter operation upon the horizontal low frequency component signal to generate a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the first stage of said calculating circuits receiving the two-dimensional signal, the vertical low horizontal low frequency component signal of the i-th (i=1,2, . . . , N-1) stage of said calculating circuits being input to the (i+1)-th stage thereof,

the i-th (i=1,2, . . . , N) stage of said calculating circuits comprising:

a series of M (M=1,2, . . . ) first delay units each having a size of X/i for receiving the input signal or the vertical low horizontal low frequency component from a pre-stage calculating circuit clocked at a first clock rate;

a series of M second delay units each having a size of 1, clocked at the first clock rate;

a convolution calculating circuit; and

a plurality of M selectors, each connected between one of said first delay units and one of said second delay units and said convolution calculating circuit, said M selectors being clocked at a clock rate twice the first clock rate;

said convolution calculating circuit receiving first output signals of said series of M first delay units to perform convolutions upon said first output signals to generate a horizontal high frequency component signal and the horizontal low frequency component signal alternately,

said series of M second delay units receiving the horizontal high frequency component signal and the horizontal low frequency component signal,

said convolution calculating circuit receiving second output signals of said series of M second delay units to perform convolutions upon said second output signals for generating a vertical high horizontal high frequency component signal, a vertical high horizontal low frequency component signal, a vertical low horizontal high frequency component signal, and a vertical low horizontal low frequency component signal, alternately, and splitting into the set of the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal and the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal,

the clock rate of said delay units of the (i+1)-th stage being a quarter of that of the i-th stage.

28. A wavelet transform apparatus for a two-dimensional input signal, for carrying out N (N=2,3, . . . ) stages of two-band analysis filter operations, each including the steps of performing a vertical two-band analysis filter operation upon a signal to generate a vertical high frequency component signal and a vertical low frequency component signal, performing a first horizontal two-band analysis filter operation upon the vertical high frequency component signal to generate a horizontal high vertical high frequency component signal and a horizontal low vertical high frequency component signal, and performing a second horizontal two-band analysis filter operation upon the vertical low frequency component signal to generate a horizontal high vertical low frequency component signal and a horizonal low vertical low frequency component signal, the first state of sad two-band analysis filter operation being performed upon the two-dimensional signal, the (i+1)-th stage of two-band analysis filter operations being performed upon the horizontal low vertical low frequency component signal obtained by the i-th (i=1,2, . . . , N-1) stage thereof, comprising a circuit for carrying out at least two stages of two-band analysis filter operations, said circuit comprising:

a plurality of series of first delay units, each series of first delay units provided for a vertical two-band analysis filter operation;

a plurality of series of second delay units, each series of second delay units provided for a horizontal two-band analysis filter operation;

first selector means, connected to said series of first delay units and said series of second delay units, for selecting one series of delay units therefrom;

a convolution calculating circuit, connected to said first selector means, for performing convolutions upon outputs of one of said series of first delay units to generate the vertical high frequency component signal and the vertical low frequency component signal and for performing convolutions upon outputs of one of said series of second delay units to generate a vertical high frequency component signal and a vertical low frequency component signal; and

second selector means, connected between said convolution calculating circuit and said series of first and second delay units, for transmitting an output of said convolution calculating circuit to one of said series of first and second delay units.

29. A wavelet transform apparatus as set forth in claim 28, wherein said series of first delay units include means for smoothing the stream of the signals therethrough.

30. A wavelet transform apparatus as set forth in claim 28, wherein said first convolution calculating circuit comprises:

a plurality of selectors, connected to said series of first delay units, for transferring the outputs of said first delay units by one location;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

31. A wavelet transform apparatus as set forth in claim 28, wherein said first convolution calculating circuit comprises:

a plurality of selectors, connected to said first delay units, for reversing a sequence of the outputs of said series of first delay units;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

32. A wavelet transform apparatus as set forth in claim 28, wherein said second convolution calculating circuit comprises:

a plurality of first selectors, connected to said series of second delay units, for transferring the outputs of said series of second delay units by one location;

a plurality of multipliers, connected to said series of first selectors, for multiplying output values of said series of first selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively;

an adder, connected to said multipliers, for summing output signals of said multipliers to alternately output a set of the horizontal high vertical high frequency component Signal and the horizontal high vertical low frequency component signal and a set of the horizontal low vertical high frequency component signal and the horizontal low vertical low frequency component signal at its terminal; and

a selector, connected to said adder for switchably outputting a set of the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal and the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal at two output terminals of said selector.

33. A wavelet transform apparatus as set forth in claim 32, wherein said second convolution calculating circuit comprises:

a plurality of first selectors, connected to said series of second delay units, for reversing a sequence of the outputs of said series of second delay units;

a plurality of multipliers, connected to said first selectors, for multiplying output values of said first selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients;

an adder, connected to said multipliers, for summing and subtracting output signals of said multipliers, selectively, to alternately output a set of the horizontal high vertical high frequency component signal and the horizontal high vertical low frequency component signal and a set of the horizontal low vertical high frequency component signal and the horizontal low vertical low frequency component signal at its output terminal; and

a selector, connected to said adder for switchably outputting a set of the horizontal high vertical high frequency component signal, the horizontal high vertical low frequency component signal and the horizontal low vertical high frequency component signal, and the horizontal low vertical low frequency component signal at two output terminals of said selector.

34. A wavelet transform apparatus for a two-dimensional input signal, for carrying out N (N=2,3, . . . ) stages of two-band analysis filter operations, each including the steps of performing a horizontal two-band analysis filter operation upon a signal to generate a horizontal high frequency component signal and a horizontal low frequency component signal, performing a first vertical two-band analysis filter operation upon the horizontal high frequency component signal to generate a vertical high horizontal high frequency component signal and a vertical low horizontal high frequency component signal, and performing a second vertical two-band analysis filter operation upon the horizontal low frequency component signal to generate a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the first stage of said two-band analysis filter operation being performed upon the two-dimensional signal, the (i+1)-th stage of two-band analysis filter operations being performed upon the vertical low horizontal low frequency component signal obtained by the i-th (i=1,2, . . . , N-1) stage thereof, comprising a circuit for carrying out at least two stages of two-band analysis filter operations, said circuit comprising:

a plurality of series of first delay units, each series of first delay units provided for a horizontal two-band analysis filter operation;

a plurality of series of second delay units, each series of second delay units provided for a vertical two-band analysis filter operation;

first selector means, connected to said series of first delay units and said series of second delay units, for selecting one series therefrom;

a convolution calculating circuit, connected to said first selector means, for performing convolutions upon outputs of one of said series of first delay units to generate the horizontal high frequency component signal and the horizontal low frequency component signal and for performing convolutions upon outputs of one of said series of second delay units to generate a horizontal high frequency component signal and a horizonal low frequency component signal; and

second selector means, connected between said convolution calculating circuit and said series of first and second delay units, for transmitting an output of said convolution calculating circuit to one of said series of first and second delay units.

35. A wavelet transform apparatus as set forth in claim 34, wherein said series of first delay units include means for smoothing the stream of the signals therethrough.

36. A wavelet transform apparatus as set forth in claim 34, wherein said first convolution calculating circuit comprises:

a plurality of selectors, connected to said series of first delay units, for transferring the outputs of said first delay units by one location;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

37. A wavelet transform apparatus as set forth in claim 34, wherein said first convolution calculating circuit comprises:

a plurality of selectors, connected to said first delay units, for reversing a sequence of the outputs of said series of first delay units;

a plurality of multipliers, connected to said selectors, for multiplying output values of said selectors by one set of a set of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients; and

an adder, connected to said multipliers, for summing output signals of said multipliers.

38. A wavelet transform apparatus as set forth in claim 34, wherein said second convolution calculating circuit comprises:

a plurality of first selectors, connected to said series of second delay units, for transferring the outputs of said series of second delay units by one location;

a plurality of multipliers, connected to said series of first selectors, for multiplying values of said series of first selectors by predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients, selectively;

an adder, connected to said multipliers, for summing the output signals of said multipliers to alternately output a set of the vertical high horizontal high frequency component signal and the vertical high horizontal low frequency component signal and a set of the vertical low horizontal high frequency component signal and the vertical low horizontal low frequency component signal at its terminal; and

a selector, connected to said adder for switchably outputting a set of the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal and the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal at two output terminals of the selector.

39. A wavelet transform apparatus as set forth in claim 38, wherein said second convolution calculating circuit comprises:

a plurality of first selectors, connected to said series of second delay units, for reversing a sequence of the outputs of sad series of second delay units;

a plurality of multipliers, connected to said first selectors, for multiplying output values of said first selectors by one set of a plurality of sets of predetermined high frequency filtering coefficients and a set of predetermined low frequency filtering coefficients;

an adder, connected to said multipliers, for summing and subtracting output signals of said multipliers, selectively, to alternately output a set of the vertical high horizontal high frequency component signal and the vertical high horizonal low frequency component signal and a set of the vertical low horizontal high frequency component signal and the vertical low horizontal low frequency component signal at an output terminal of said adder; and

a selector, connected to said adder for switchably outputting a set of the vertical high horizontal high frequency component signal, the vertical high horizontal low frequency component signal and the vertical low horizontal high frequency component signal, and the vertical low horizontal low frequency component signal at two output terminals of said selector.

40. A wavelet transform apparatus for a two-dimensional input signal having a vertical size of X and a horizontal size of Y, comprising:

a first two-band analysis filter circuit including a series of M first delay units each having a size of X for receiving the input signal clocked at a frequency f_s, and a first convolution calculating circuit clocked at the frequency f_s, connected to said series of first delay units, for performing convolutions upon outputs thereof with predetermined high frequency filtering coefficients and low frequency filtering coefficients to alternately generate a vertical high frequency component signal and a vertical low frequency component signal;

a second two-band analysis filter circuit including a series of M second delay Units each having a size of 1 for receiving the vertical high frequency component signal and the vertical low frequency component signal from said first two-band analysis filter circuit clocked at the frequency f_s, and a second convolution calculating circuit clocked at the frequency f_s, connected to said series of second delay units, for performing convolutions upon outputs thereof with the predetermined high frequency filtering coefficients and the low frequency filtering coefficients to alternately generate a horizontal high vertical high frequency component signal, a horizontal low vertical high frequency component signal, a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the horizontal high vertical high frequency component signal, the horizontal low vertical high frequency component signal, and the horizontal high vertical low frequency component signal being output from said apparatus,

a third two-band analysis filter circuit including;

a series of M third delay units each having a size of X/2 clocked at a frequency f_s /4;

a series of M fourth delay units each having a size of 1 clocked at the frequency f_s /4;

a series of M fifth delay units each having a size of X/4 clocked at the frequency f_s /8;

a series of M sixth delay units each having a size of 1 clocked at the frequency f_s /8;

a plurality of M first selectors, connected to said series of third to sixth M delay units, and clocked at the frequency f_s ;

a third convolution calculating circuit, connected to said M first selectors and clocked at the frequency f_s, for performing convolutions upon outputs of a selected series of third to sixth delay units with the predetermined high frequency filtering coefficients and the predetermined low frequency filtering coefficients to alternately generate a horizontal high vertical high frequency component signal, a horizontal low vertical high frequency component signal, a horizontal high vertical low frequency component signal, and a horizontal low vertical low frequency component signal, the horizontal high vertical high frequency component signal, the horizontal low vertical high frequency component signal, and the horizontal high vertical low frequency component signal being output from said apparatus; and

a second selector, connected to said third convolution circuit, for transmitting the vertical low frequency component signals based upon the outputs of said series of third and fifth delay units to said series of fourth and sixth delay units, respectively, and transmitting the horizontal low vertical low frequency component signals based upon the outputs said series of fourth delay units to said series of fifth delay units.

41. A wavelet transform apparatus as set forth in claim 40, wherein said series of first delay units include means for smoothing the stream of the signals therethrough.

42. A wavelet transform apparatus for a two-dimensional input signal having a horizontal size of X and a vertical size of Y, comprising:

a first two-band analysis filter circuit including a series of M first delay units each having a size of X for receiving the input signal clocked at a frequency f_s, and a first convolution calculating circuit clocked at the frequency f_s, connected to said series of first delay units, for performing convolutions upon outputs thereof with predetermined high frequency filtering coefficients and low frequency filtering coefficients to alternately generate a horizontal high frequency component signal and a horizontal low frequency component signal;

a second two-band analysis filter circuit including a series of M second delay units each having a size of 1 for receiving the horizontal high frequency component signal and the horizontal low frequency component signal from said first two-band analysis filter circuit clocked at the frequency f_s, and a second convolution calculating circuit clocked at the frequency f_s, connected to said series of second delay units, for performing convolutions upon outputs thereof with the predetermined high frequency filtering coefficients and the low frequency filtering coefficients to alternately generate a vertical high horizontal high frequency component signal, a vertical low horizontal high frequency component signal, a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the vertical high horizontal high frequency component signal, the vertical low horizontal high frequency component signal, and the vertical high horizontal low frequency component signal being output from said apparatus,

a third two-band analysis filter circuit including;

a series of M third delay units each having a size of X/2 clocked at a frequency f_s /4;

a series of M fourth delay units each having a size of 1 clocked at the frequency f_s /4;

a series of M fifth delay units each having a size of X/4 clocked at the frequency f_s /8;

a series of M sixth delay units each having a size of 1 clocked at the frequency f_s /8;

a plurality of M first selectors, connected to said series of third to sixth M delay units, and clocked at the frequency f_s ;

a third convolution calculating circuit, connected to said M first selectors and clocked at the frequency f_s, for performing convolutions upon outputs of a selected series of third to sixth delay units with the predetermined high frequency filtering coefficients and the predetermined low frequency filtering coefficients to alternately generate a vertical high horizontal high frequency component signal, a vertical low horizontal high frequency component signal, a vertical high horizontal low frequency component signal, and a vertical low horizontal low frequency component signal, the vertical high horizontal high frequency component signal, the vertical low horizontal high frequency component signal, and the vertical high horizontal low frequency component signal being output from said apparatus; and

a second selector, connected to said third convolution circuit, for transmitting the horizontal low frequency component signals based upon the outputs of said series of third and fifth delay units to said series of fourth and sixth delay units, respectively, and transmitting the vertical low horizontal low frequency component signals based upon the outputs said series of fourth delay units to said series of fifth delay units.

43. A wavelet transform apparatus as set forth in claim 42, wherein said series of third and fifth delay units include means for smoothing the stream of the signals therethrough.

44. A wavelet transform apparatus for a two-dimensional input signal having a vertical size of X and a horizontal size of Y, comprising:

a first two-band analysis filter circuit including;

a series of M first delay units each having a size of X for receiving the input signal clock at a frequency f_s ;

a series of M second delay units each having a size of 1 for receiving a vertical high frequency component signal and a vertical low frequency component signal clocked at the frequency f_s ;

a plurality of M first selectors, connected to said series of first and second delay units and, clocked at a frequency 2f_s ; and

a first convolution calculating circuit, connected to said series of second delay units and clocked at the frequency 2f_s, for performing convolutions upon outputs of a selected series of first and second delay units with predetermined high frequency filtering coefficients and low frequency filtering coefficients to alternately generate a horizontal high vertical high frequency component signal, a horizontal low vertical high frequency component signal, a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the horizontal high vertical high frequency component signal, the horizontal low vertical high frequency component signal and the horizontal high vertical low frequency component signal being output from said apparatus,

a second two-band analysis filter circuit including;

a series of M third delay units each having a size of X/2 clocked at a frequency f_s /4;

a series of M fourth delay units each having a size of 1 clocked at the frequency f_s /4;

a series of M fifth delay units each having a size of X/4 clocked at the frequency f_s /8;

a series of M sixth delay units each having a size of 1 clocked at the frequency f_s /8;

a plurality of M second selectors, connected to said series of third to sixth M delay units and clocked at the frequency f_s ;

a second convolution calculating circuit, connected to said M second selectors and clocked at the frequency f_s, for performing convolutions upon outputs of a selected series of third to sixth delay units with the predetermined high frequency filtering coefficients and the predetermined low frequency filtering coefficients to alternately generate a horizontal high vertical high frequency component signal, a horizontal low vertical high frequency component signal, a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the horizontal high vertical high frequency component signal, the horizontal low vertical high frequency component signal and the horizontal high vertical low frequency component signal being output from said apparatus; and

a third selector, connected to said second convolution circuit, for transmitting the vertical low frequency component signals based upon the outputs of said series of third and fifth delay units to said series of fourth and sixth delay units, respectively, and transmitting the horizontal low vertical low frequency component signals based upon the outputs said series of fourth delay units to said series of fifth delay units.

45. A wavelet transform apparatus as set forth in claim 44, wherein said series of third and fifth delay units include means for smoothing the stream of the signals therethrough.

46. A wavelet transform apparatus for a two-dimensional input signal having a horizontal size of X and a vertical size of Y, comprising:

a first two-band analysis filter circuit including;

a series of M first delay units each having a size of X for receiving the input signal clock at a frequency f_s ;

a series of M second delay units each having a size of 1 for receiving a horizontal high frequency component signal and a horizontal low frequency component signal clocked at the frequency f_s ;

a plurality of M first selectors, connected to said series of first and second delay units and, clocked at a frequency 2f_s ; and

a first convolution calculating circuit, connected to said series of second delay units and clocked at the frequency 2f_s, for performing convolutions upon outputs of a selected series of first and second delay units with predetermined high frequency filtering coefficients and low frequency filtering coefficients to alternately generate a vertical high horizontal high frequency component signal, a vertical low horizontal high frequency component signal, a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the vertical high horizontal high frequency component signal, the vertical low horizontal high frequency component signal and the vertical high horizontal low frequency component signal being output from said apparatus,

a second two-band analysis filter circuit including;

a series of M third delay units each having a size of X/2 clocked at a frequency f_s /4;

a series of M fourth delay units each having a size of 1 clocked at the frequency f_s /4;

a series of M fifth delay units each having a size of X/4 clocked at the frequency f_s /8;

a series of M sixth delay units each having a size of 1 clocked at the frequency f_s /8;

a plurality of M second selectors, connected to said series of third to sixth M delay units and clocked at the frequency f_s ;

a second convolution calculating circuit, connected to said M second selectors and clocked at the frequency f_s, for performing convolutions upon outputs of a selected series of third to sixth delay units with the predetermined high frequency filtering coefficients and the predetermined low frequency filtering coefficients to alternately generate a vertical high horizontal high frequency component signal, a vertical low horizontal high frequency component signal, a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the vertical high horizontal high frequency component signal, the vertical low horizontal high frequency component signal and the vertical high horizontal low frequency component signal being output from said apparatus; and

a third selector, connected to said second convolution circuit, for transmitting the horizontal low frequency component signals based upon the outputs of said series of third and fifth delay units to said series of fourth and sixth delay units, respectively, and transmitting the vertical low horizontal low frequency component signals based upon the outputs said series of fourth delay units to said series of fifth delay units.

47. A wavelet transform apparatus as set forth in claim 46, wherein said series of third and fifth delay units include means for smoothing the stream of the signals therethrough.

48. A wavelet transform apparatus for s two-dimensional input signal having a vertical size of X and a horizontal size of Y, comprising a single two-band analysis filter circuit including:

a series of M first delay units each having a size of X for receiving the input signal clock at a frequency f_s ;

a series of M second delay units each having a size of 1 clocked at the frequency f_s ;

a series of M third delay units each having a size of X/2 clocked at a frequency f_s /4;

a series of M fourth delay units each having a size of 1 clocked at the frequency f_s /4;

a series of M fifth delay units each having a size of X/4 clocked at a frequency f_s /8;

a series of M sixth delay units each having a size of 1 clocked at the frequency f_s /8;

a plurality of M first selectors, connected to said series of first to sixth delay units, clocked at the frequency 3f_s ;

a single convolution calculating circuit, connected to said M first selectors and clocked at the frequency 3f_s, for performing convolutions upon outputs of a selected series of first to sixth delay units with predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients to alternately generate a horizontal high vertical high frequency component signal, a horizontal low vertical high frequency component signal, a horizontal high vertical low frequency component signal and a horizontal low vertical low frequency component signal, the horizontal high vertical high frequency component signal, the horizontal low vertical high frequency component signal and the horizontal high vertical low frequency component signal being output from said apparatus; and

a second selector clocked at the frequency 3f_s, connected to said single convolution circuit, for transmitting the vertical low frequency component signals based upon the outputs of said series of first, third and fifth delay units to said series of fourth and sixth delay units, respectively, and transmitting the horizontal low vertical low frequency component signals based upon the outputs said series of second and fourth delay units to said series of third and fifth delay units, respectively.

49. A wavelet transform apparatus as set forth in claim 48, wherein said series of third and fifth delay units include means for smoothing the stream of the signals therethrough.

50. A wavelet transform apparatus for a two-dimensional input signal having a horizontal size of X and a vertical size of Y, comprising a single two-band analysis filter circuit including:

a series of M first delay units each having a size of X for receiving the input signal clock at a frequency f_s ;

a series of M second delay units each having a size of 1 clocked at the frequency f_s ;

a series of M third delay units each having a size of X/2 clocked at a frequency f_s /4;

a series of M fourth delay units each having a size of 1 clocked at the frequency f_s /4;

a series of M fifth delay units each having a size of X/4 clocked at a frequency f_s /8;

a series of M sixth delay units each having a size of 1 clocked at the frequency f_s /8;

a plurality of M first selectors, connected to said series of first to sixth delay units, clocked at the frequency 3f_s ;

a single convolution calculating circuit, connected to said M first selectors and clocked at the frequency 3f_s, for performing convolutions upon outputs of a selected series of first to sixth delay units with predetermined high frequency filtering coefficients and predetermined low frequency filtering coefficients to alternately generate a vertical high horizontal high frequency component signal, a vertical low horizontal high frequency component signal, a vertical high horizontal low frequency component signal and a vertical low horizontal low frequency component signal, the vertical high horizontal high frequency component signal, the vertical low horizontal high frequency component signal and the vertical high horizontal low frequency component signal being output from said apparatus; and

a second selector clocked at the frequency 3f_s, connected to said single convolution circuit, for transmitting the horizontal low frequency component signals based upon the outputs of said series of first, third and fifth delay units to said series of fourth and sixth delay units, respectively, and transmitting the vertical low horizontal low frequency component signals based upon the outputs said series of second and fourth delay units to said series of third and fifth delay units, respectively.

51. A wavelet transform apparatus as set forth in claim 50, wherein said series of third and fifth delay units include means for smoothing the stream of the signals therethrough.