Current starved inverter voltage controlled oscillator

• US 5,349,311 A
• Filed: 11/23/1992
• Issued: 09/20/1994
• Est. Priority Date: 11/23/1992
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Mentzer, Ray A.
• Primary Examiner(s): Lee, Benny T.
• Assistant Examiner(s): KINKEAD, ARNOLD M
• Application Number:
  US07/980,508
• Time in Patent Office: 666 Days
• Field of Search: 331/1 A, 331/34, 331/25, 331/57, 331/108 B, 331/108 C, 331/17, 331/175, 331/179, 331/177 R, 328/155
• US Class Current: 331/57
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 7/089 the phase or frequency detector generating up-down pulses H03L7/087 takes precedence
• CPC Class Codes: H03L 7/0997 Controlling the number of delay elements connected in series in the ring oscillator

Abstract

A voltage controlled oscillator (VCO) operating as a variable length, variable delay, ring oscillator having a current starved inverter and an anti high-gain circuit for each stage. A VCO feedback signal is compared with a reference frequency obtained, for example, from a system crystal oscillator. A phase and frequency detector monitors these two input signals and issues "up" or "down" commands to a digital counter. This digital counter delivers select signals via a decoder and also drives a Digital to Analog Converter ("DAC"). The digital select signal from the counter chooses an operational stage from the multi-stage, tandem-connected VCO. A broadband operation for the VCO is achieved by overlapping the individual frequency ranges associated with each of the individual stages. The DAC moves the operation along each selected frequency range associated with a selected stage until a system lock between the VCO output and the crystal references is achieved.

Claims

1. A method of compensating for a non-linear region of high gain in a ring oscillator, said method comprising:

representing the metal layers forming gates and various stray capacitance as a capacitor to be charged and discharged at an oscillating frequency for said oscillator;

charging and discharging said capacitor by a variable current supplied through a series circuit by a current starved inverter; and

compensating for said high gain and non-linear region by an anti high-gain circuit having a source of fixed charging and discharging current in parallel with said variable current supplied by said current starved inverter.

2. The method of claim 1 further comprising the steps of:

automatically controlling the amount of variable current for said oscillator in order to establish a finite operational frequency range for said oscillator.

3. The method of claim 2 comprising the additional steps of:

providing a broadband low-gain linear ring oscillator;

assembling, for said oscillator, a family of individual finite frequency bands which each progressively adds to a combined operational broadband frequency range;

connecting a plurality of said individual oscillators in tandem to one another; and

feeding back a signal from each successive oscillator to the first oscillator in the tandem connection in order to form said broadband ring oscillator.

4. A ring oscillator comprising a plurality of stages connected in tandem, each stage of said plurality of stages providing a frequency response and having:

i. a digital input terminal,

ii. an inverter having an input, an output and a feedback connection from said output to said input, and

iii. an anti-high-gain circuit coupled to said inverter,

wherein one of said plurality of stages is actuated in response to a digital control signal at said digital input terminal and said frequency response of the actuated stage is adjusted in response to an analog control signal.

5. Ring oscillator of claim 4 comprising a three-state select circuit for controlling feedback at said inverter, said three-state select circuit coupled to said inverter and coupled to said digital input terminal.

6. Ring oscillator of claim 5 wherein said plurality of stages are connected to form at least two separate ring oscillator chains, each of said oscillator chains having one or more of said stages, and wherein a first oscillator chain of said separate ring oscillator chains is a low-frequency end and a second oscillator chain of said separate ring oscillator chains is a high-frequency end.

7. Ring oscillator of claim 6 further comprising a logic and select network coupled to at least two of said plurality of stages.

8. Ring oscillator of claim 5 wherein the total number of stages in said ring oscillator is a finite number, n, and wherein a one-out-of-n selection actuates one of said stages.

9. Ring oscillator of claim 5 wherein said anti-high-gain circuit comprises a first fixed current source and a second fixed current source, said first fixed current source coupled to a high-voltage node of said inverter and said second fixed current source coupled to a low-voltage node of said inverter.

10. Ring oscillator of claim 5 wherein said inverter is a CMOS inverter.

11. Ring oscillator of claim 5 with each of said plurality of stages further comprising a current mirror coupled to said inverter and an independent reference current source coupled to said current mirror.

12. A voltage-controlled ring oscillator comprising a plurality of stages connected in tandem, each stage of said plurality of stages having:

i. an input terminal,

ii. an output terminal,

iii. a first current source, a second current source, a third current source, and fourth current source,

iv. an inverter having a high-voltage node, a low-voltage node, an inverter input, an inverter output and a feedback connection from said inverter output to said inverter input, said first and second current sources coupled to said high-voltage node and said third and fourth current sources coupled to said low-voltage node,

v. a three-state select circuit coupled to said inverter and coupled to said input terminal,

wherein a first control signal actuates one of said plurality of stages and a second control signal adjusts a frequency response of the actuated stage.

13. Voltage-controlled ring oscillator of claim 12 wherein said plurality of stages are connected to form at least two separate ring oscillator chains, each said oscillator chain having one or more of said stages, and where a first oscillator chain is a low-frequency end and a second oscillator chain is a high-frequency end.

14. Voltage-controlled ring oscillator of claim 13 further comprising a logic and select network coupled to at least two of said plurality of stages.

15. Voltage-controlled ring oscillator of claim 12 wherein said first current source and said third current source are fixed current sources and said second current source and said fourth current source are variable current sources and said third current source is coupled in parallel with said fourth current source.

16. Voltage-controlled ring oscillator of claim 12 wherein said first control signal is a digital signal and said second control signal is an analog signal.