Battery operated computer having improved battery monitor and cell reversal protection circuit

• US 5,349,668 A
• Filed: 04/15/1992
• Issued: 09/20/1994
• Est. Priority Date: 04/15/1992
• Status: Expired due to Fees

• Current Assignee: Lenovo Singapore Pte Limited (Lenovo Group Ltd.)
• Original Assignee: International Business Machines SA (International Business Machines Corporation)
• Inventors: Wulf, James C., Jones, Christpher D., Gladstein, Leo A.
• Primary Examiner(s): CHUN, DEBRA
• Application Number:
  US07/869,411
• Time in Patent Office: 888 Days
• Field of Search: 395/750, 364/707
• US Class Current: 713/340
• CPC Class Codes: G01R 19/16542 for batteries charge condition monitoring in G01R31/36
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24

Abstract

A battery operated computer includes a battery having a plurality of serially connected banks of battery cells that are monitored during operation of the computer to detect a nearly depleted battery bank and a fully depleted battery bank. The computer also includes a plurality of microprocessors including a host or system processor, a service processor and a power subsystem processor. When a nearly depleted battery bank is detected, the power subsystem processor is interrupted and it sends a message to the service processor which in turn interrupts the host processor. An interrupt handler then powers down the system. When a fully depleted battery bank is detected, the battery is immediately disconnected and the system is shutoff to prevent polarity or cell reversal.

Claims

1. A battery-operated, portable computer comprising:

a battery connected to said computer for supplying electrical energy to operate said computer, said battery comprising a plurality of battery banks connected in series, each bank comprising a like number of matched battery cells connected in series;

voltage monitoring means connected to said banks for measuring respective bank voltages across each of said banks during operation of said computer, said voltage monitoring means comprising first means for generating a low battery warning signal when the bank voltage across any one of said banks drops below a predetermined first value corresponding to a battery charge level allowing said computer to save volatile data and power down under program control, said voltage monitoring means further comprising second means for generating a cutoff signal when the bank voltage across any one of said banks drops below a predetermined second value lower than said first value, said second value corresponding to a voltage level below which cell polarity reversal is eminent;

shutdown means connected to said monitoring means for receiving said warning signal and, in response thereto, initiating saving volatile data and powering down said computer; and

cell reversal protection circuit means connected to said monitoring means for receiving said cutoff signal and, in response thereto, immediately disconnecting said battery from said computer to prevent cell polarity reversal from occurring.

2. A computer in accordance with claim 1 comprising:

a DC to DC converter connected to said battery for converting power from said battery into different voltages for operating components of said computer;

said cell reversal protection circuit means including switch means between said battery and said converter for disconnecting said converter from said battery in response to said cutoff signal.

3. A computer in accordance with claim 2 wherein:

said battery comprises rechargeable nickel cadmium cells arranged with n cells per bank;

said first value of bank voltage equals n multiplied by 1.3 volts per cell;

and said second value of bank voltage equals n multiplied by 1.0 volts per cell.

4. A computer in accordance with claim 2 comprising:

a power subsystem comprising said battery, said monitor, and a power subsystem microcontroller (PSM), said PSM having an interrupt request line connected to said monitor for receiving said low battery warning signal and interrupting operation of said PSM in response to said low battery warning signal.

5. A computer in accordance with claim 4 comprising:

a main microprocessor

a plurality of system components including a volatile main memory operated under control of said main microprocessor for storing said volatile data, and a non-volatile memory for storing said volatile data saved by said shutdown means;

a power distribution system (PDS) connected to said power subsystem and to said system components for supplying power from said power subsystem to said components, said PDS comprising a plurality of switches selectively operable in response to control signals from said main microprocessor to selectively power up and power down said components;

and third means operable in response to interruption of said PSM by said low battery warning signal to signal main microprocessor to operate said plurality of switches and power down said components to thereby shutdown operation of said computer.

6. A computer in accordance with claim 5 wherein said third means comprises a service processor connected to said main processor and to said PSM, said PSM being operable in response to being interrupted by said low battery warning signal to set a flag in a data packet and transmit such packet to said service processor, said service processor being operable in response to receiving said packet to generate an interrupt request and send such request to said main processor.

7. A computer in accordance with claim 6 wherein said service processor includes a power state register settable by said PSM in response to receiving said data packet, to indicate cause of such interrupt, said host being operative to read said power state register to determine the cause of such interrupt.

8. A computer in accordance with claim 1 wherein said voltage monitoring means comprises:

fourth means for generating first and second reference signals corresponding respectively to said first value and to said second value; and

comparator means connected to said fourth means to receive said first and second reference signals, said comparator means being further connected to receive said bank voltages and operative to compare said bank voltages with said first and second reference signals and generate said low battery warning signal and said cutoff signal in response to such comparisons.

9. A computer in accordance with claim 8 wherein said cell reversal protection circuit means further comprises a latch connected to receive said cutoff signal and set said latch in response thereto, said switch means being operable under control of said latch to turn off said switch means when said latch is set.

10. A computer in accordance with claim 9 wherein said switch means comprises:

a first electronic switch connected between said battery and said converter for controlling the supply of battery power to said converter;

and a second electronic switch having a first connection to said first switch for controlling actuation of said first switch and a second connection for controlling actuation of said second electronic switch.

11. A computer in accordance with claim 10 comprising:

gate means having an output connected to said second electronic switch and first and second inputs, said first input being connected to said latch;

and monitoring means connected to said second input of said gate means for disabling said gate means when said computer is connected to an external source of dc power, to thereby disconnect said battery.