Method for reducing power consumption includes comparing variance in number of times microprocessor tried to read input in predefined period to predefined variance

• US 5,349,688 A
• Filed: 12/11/1992
• Issued: 09/20/1994
• Est. Priority Date: 11/13/1989
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Chips & Technologies, Inc. (Intel Corporation)
• Inventors: Nguyen, Au H.
• Primary Examiner(s): Bowler, Alyssa H.
• Assistant Examiner(s): GECKIL, MEHMET B
• Application Number:
  US07/989,249
• Time in Patent Office: 648 Days
• Field of Search: 395/750, 395/800, 395/275, 395/550, 364/707, 371/12, 371/16, 371/70
• US Class Current: 713/323
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices

Abstract

Two methods and apparatus for reducing power consumption in battery powered computers are disclosed. The first places the computer in a sleep mode whenever a certain data input function is called. The second applies statistical analysis to calls to another data input function. By measuring the number of times the computer has tried to read data from the keyboard over the past predefined period, the variance between the high and low number of calls over the present and preceding time periods, and whether the number of times the computer has tried to read data has both exceeded the present limit and remained within the preset variance limit for a predefined minimum time, the desirability of activating a sleep mode for the computer can be determined.

Claims

1. A method for placing a microprocessor, having a clock generating a clock frequency, into a sleep state while the microprocessor waits for data input from a keyboard, the method being performed in a system controller coupled to said microprocessor and comprising the steps of:

(a) counting a number of times the microprocessor has tried to read data from the keyboard in a predefined amount of time;

(b) comparing said number of times the microprocessor tried to read data in the predefined amount of time with a predefined minimum number;

(c) comparing the variance in said number of times the microprocessor tried to read data in a predefined amount of time to a predefined variance amount, if a number of tries exceeded said predefined minimum number;

(d) comparing a length of time that both said number of times the microprocessor tried to read data exceeded said predefined minimum number and the result was less than the predefined variance to a predefined minimum time if the variance was less than the predefined variance; and

(e) placing the computer into a sleep state if the length of time exceeded the minimum time, wherein in said sleep state, the clock stops generating the clock frequency.

2. The method of claim 1 wherein said microprocessor is a 80286.

3. The method of claim 1 further comprising the step of separately setting said predefined minimum number, said predefined variance, and said predefined minimum time.

4. The method of claim 1 wherein said predetermined time is 55×

10^-3 seconds.

5. A method for placing a microprocessor, having a clock generating a clock signal with a first frequency, into a sleep state while the microprocessor waits for data input from a keyboard, the method being performed in a system controller coupled to said microprocessor and comprising the steps of:

(a) counting a number of times the microprocessor has tried to read data from the keyboard in a predefined amount of time;

(b) comparing said number of times the microprocessor tried to read data in the predefined amount of time with a predefined minimum number;

(c) comparing the variance in said number of times the microprocessor tried to read data in a predefined amount of time to a predefined variance amount, if a number of tries exceeded said predefined minimum number;

(d) comparing a length of time that both said number of times the microprocessor tried to read data exceeded said predefined minimum number and the result was less than the predefined variance to a predefined minimum time if the variance was less than the predefined variance; and

(e) placing the computer into a sleep state if the length of time exceeded the minimum time, wherein in said sleep state, the clock signal has a second frequency.

6. The method of claim 5 wherein said second frequency is 4×

10⁶ hertz.

7. The method of claim 5 wherein said microprocessor is an 80386SX.

8. The method of claim 5 further comprising the step of separately setting said predefined minimum number, said predefined variance, and said predefined minimum time.

9. The method of claim 5 wherein said predetermined time is 55×

10^-3 seconds.

10. A method for placing a microprocessor, having a clock generating a clock frequency, into a sleep state while the microprocessor waits for data input from a keyboard, the method being performed in a system controller coupled to said microprocessor and comprising the steps of:

(a) determining whether said microprocessor is presently in said sleep state;

(b) determining whether said sleep state can be invoked if said microprocessor is not presently in said sleep state;

(c) counting a number of time the microprocessor has tried to read data from the keyboard in a predefined amount of time if said sleep state can be invoked;

(d) comparing said number of times the microprocessor tried to read data in the predefined amount of time with a predefined minimum number;

(e) comparing said number of times the microprocessor tried to read data in the predefined amount of time with a predefined maximum number;

(f) comparing the variance in said number of times the microprocessor tried to read data in a predefined amount of time to a predefined variance amount, if a number of tries exceeded said predefined minimum number and was less than said predefined maximum number;

(g) comparing a content of an idle interval counter to a predefined idle interval number if said variance was less than the predefined variance; and

(h) placing the computer into a sleep state wherein said clock frequency is stopped or reduced if said content exceeds said predefined idle number.

11. The method of claim 10 further comprising the step of:

(i) separately setting said predefined minimum number to a large number;

(j) separately setting said predefined maximum number to zero;

(k) separately setting said predefined variance to a first preset number;

(l) separately setting said predefined minimum time to a second preset number;

(m) separately setting said idle interval counter to zero; and

(n) separately setting said predefined idle number to a preset number.

12. The method of claim 10 further comprising the step of replacing said number of times with said predefined minimum number if said number of times is less than said predefined minimum number.

13. The method of claim 10 further comprising the step of replacing said number of times with said predefined maximum number if said number of times exceeds said predefined maximum number.

14. The method of claim 10 further comprising the step of incrementing said idle interval counter by one if said predefined minimum number is less than said number of times and said maximum number is larger than said number of times.

15. The method of claim 10 further comprising the step of setting a snooze flag if said microprocessor is in said sleep state.

16. The method of claim 10 wherein steps (b)-(h) are skipped if said microprocessor is in sleep state.

17. The method of claim 10 wherein the control of said microprocessor is passed to a calling program if said sleep state can not be invoked.

18. The method of claim 17 wherein said calling program requests said sleep state.

19. The method of claim 10 wherein said predetermined time is 55×

10^-3 seconds.