Technique for increasing the data rate in a spread spectrum data link
First Claim
1. A method of spread spectrum encoding digital data on a data link in which information is transmitted and received at a given rate on a waveform, comprising:
- synchronizing the waveform by first transmitting a synchronizing fixed pattern of a predetermined number of bits of 1'"'"'s and 0'"'"'s, and generating a sync pulse when all bits of this fixed pattern sync code have been received by a sync corrector, and the sync pulse provides all timing references for the duration of a message;
modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a fixed chip code sequence of a predetermined number of bits, clocked at said given rate, using at least four different data chip codes, designated as A, B, C and D chip code patterns, with each chip code sequence occurring during a window of a predetermined duration, the two-bit data content being modulated with respect to where the chip code correlated in the window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and
having each of the four data chip codes represent data in addition to the two bits represented by said pulse position.
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Abstract
A method for increasing the bit rate of a data link is to select two additional 31-bit chip code patterns that are orthogonal to the present two chip codes, and to each other. This method will not require any more bandwidth that the present 10 MHz used. This method suggests that each of the four chip code patterns are assigned a two bit value i.e.: 00, 01, 10, 11. At present, the two correlated chip codes represent data in a pulse position method. No information is transferred by determining which of the two chip codes actually correlated. This new method suggests each of the four chip code patterns will still perform the pulse position modulation and also provide two additional bits of data. These additional two bits of data will up the data rate of the link by 100 percent. Alternatively, the data rate may be increased by coding the datasuch that a reduction in duty cycle is realized as well as an increase in the data rate. Variations of the coding scheme avoid repeating a chip code in successive windows to reduce the effects of multipath propagation.
88 Citations
5 Claims
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1. A method of spread spectrum encoding digital data on a data link in which information is transmitted and received at a given rate on a waveform, comprising:
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synchronizing the waveform by first transmitting a synchronizing fixed pattern of a predetermined number of bits of 1'"'"'s and 0'"'"'s, and generating a sync pulse when all bits of this fixed pattern sync code have been received by a sync corrector, and the sync pulse provides all timing references for the duration of a message; modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a fixed chip code sequence of a predetermined number of bits, clocked at said given rate, using at least four different data chip codes, designated as A, B, C and D chip code patterns, with each chip code sequence occurring during a window of a predetermined duration, the two-bit data content being modulated with respect to where the chip code correlated in the window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and having each of the four data chip codes represent data in addition to the two bits represented by said pulse position.
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2. A method of spread spectrum encoding digital data on a data link in which a waveform is transmitted and received at a 10 MHz rate, comprising:
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synchronizing the waveform by first transmitting chips with a 127-bit synchronizing fixed pattern of 1'"'"'s and 0'"'"'s, and generating a sync pulse when all 127 bits of this fixed pattern sync code have been received by a sync corrector, which sync pulse provides all timing references for the duration of a message; modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a 31-bit fixed chip code sequence, clocked at a 10 MHz rate, thus taking 3.1 microseconds to complete, using at least four different 31-bit data chip codes, designated as A, B, C and D chip code patterns, with each 3.1 microsecond chip code sequence occurring during a 4.0-microsecond window, the two-bit data content being encoded with respect to where the chip code correlated in the 4.0-microsecond window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and having each of the four data chip codes represent data in addition to the two bits represented by said pulse position. - View Dependent Claims (3, 4, 5)
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Specification