Method for fabricating an integrated circuit module

• US 5,353,498 A
• Filed: 07/09/1993
• Issued: 10/11/1994
• Est. Priority Date: 02/08/1993
• Status: Expired due to Term

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: General Electric Company
• Inventors: Wildi, Eric J., Daum, Wolfgang, Cole, Herbert S., Wojnarowski, Robert J., Gdula, Michael, Fillion, Raymond A.
• Primary Examiner(s): Arbes, Carl J.
• Application Number:
  US08/087,434
• Time in Patent Office: 459 Days
• Field of Search: 29/830, 29/840, 29/827, 437/209, 437/183
• US Class Current: 29/840
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/2402 Laminated, e.g. MCM-L type
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/24195 the item being a discrete passive component
• CPC Class Codes: H01L 2224/2518 being disposed on at least two different sides of the body, e.g. dual array
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/82039 using a laser
• CPC Class Codes: H01L 2224/83005 being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/8385 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/92144 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/0652 Bump or bump-like direct electrical connections from substrate to substrate
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 2225/06589 Thermal management, e.g. cooling
• CPC Class Codes: H01L 2225/1035 : the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 2225/1064 : Electrical connections provided on a side surface of one or more of the containers
• CPC Class Codes: H01L 23/293 : Organic, e.g. plastic
• CPC Class Codes: H01L 23/295 : containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 23/4334 : Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/538 : the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates H05K takes precedence; manufacture or treatment H01L21/4846 ; mountings per se H01L23/12; materials H01L23/49866
• CPC Class Codes: H01L 23/5389 : the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/96 : the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/18162 : of a chip with build-up interconnect
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: Y10T 29/49144 : by metal fusion

Abstract

Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate molding material is added within the mold form, and the substrate molding material is then hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips. A thermal plug may be affixed to the backside of a chip before substrate molding material is added. A connector frame may be placed on the adhesive layer before substrate molding material is added. A dielectric layer may be placed over the backsides of the chips before the substrate molding material is added to enhance repairability. A portion of the chips and substrate molding material may be removed after the substrate molding material is hardened.

Claims

1. A method of fabricating an integrated circuit module substrate on a base, comprising the steps of:

applying an insulative base sheet over said base, said base sheet comprising a polymer film having an adhesive coating situated on the side of the polymer film opposite said base;

placing a plurality of chips having contact pads face down on said base sheet;

positioning a mold form around said chips;

adding substrate molding material within said mold form;

hardening said substrate molding material;

separating said base from said base sheet;

forming a plurality of vias through said base sheet, some of said plurality of vias being aligned with predetermined ones of said contact pads; and

providing a pattern of electrical conductors extending through selected ones of said plurality of vias in said base sheet to form an integrated circuit module.

2. The method of claim 1, further including the step of removing said mold form from said substrate molding material after hardening said substrate molding material.

3. The method of claim 1, wherein said substrate molding material comprises plastic.

4. The method of claim 1, wherein said substrate molding material comprises material selected from the group consisting of aliphatic and aromatic polymers.

5. The method of claim 4, wherein said substrate molding material comprises material selected from the group consisting of thermoplastic and thermoset polymers.

6. The method of claim 5, wherein said substrate molding material comprises material selected from the group consisting of polyetherimide resins, polytetrafluoroethylenes, epoxy, benzocyclobutene, acrylates, polyurethanes, polyimides, and polyimide resins.

7. The method of claim 3, wherein said molding material includes therein filler material in a configuration selected from the group consisting of particles, fibers, screens, mats, and plates.

8. The method of claim 7, wherein said filler material is selected from the group consisting of glass, SiC, AlN, diamond, graphite, Al₂ O₃, and metal.

9. The method of claim 1, wherein said substrate molding material comprises a blend of polyimide, epoxy, and crosslinking catalyst.

10. The method of claim 9, wherein the step of hardening includes heating said substrate molding material at temperatures ranging from 25°

C. to 250°

C.

11. The method of claim 9, wherein said substrate molding material further includes therein particles of material selected from the group consisting of alumina, aluminum nitride, aluminum silicon carbide, aluminum, and diamond.

12. The method of claim 9, wherein the adhesive coating on said polymer film layer comprises the same material as said substrate molding material, and further comprising the step of hardening said adhesive coating simultaneously with said substrate molding material.

13. The method of claim 1, further including the step of affixing a thermal plug on the backside of at least one of said chips prior to adding said substrate molding material within said mold form.

14. The method of claim 1, further including the step of placing a connector frame including connection pads coplanar with said contact pads around said chips prior to adding said substrate molding material.

15. The method of claim 14, wherein said connector frame further comprises an array of pins which extend at least through said substrate molding material to the surface thereof.

16. The method of claim 14, wherein said connector frame further comprises an array of pins which extend at least through to the side of said substrate molding material.

17. The method of claim 1, further including the step of applying an inner dielectric layer over the backside of said chips and said base sheet prior to providing said mold form.

18. The method of claim 17, further including the steps of providing an electrically conductive strip on said inner dielectric layer prior to applying said inner dielectric layer over said chips and wherein said conductive strip is applied onto a region that extends from a portion of the backside of at least one of said chips to a portion of said base sheet.

19. The method of claim 18, further including the final step of providing an electrical connection from said electrically conductive strip to one of the group consisting of a voltage source and ground.

20. The method of claim 1, further including the step of removing a portion of said substrate molding material after hardening said substrate molding material.

21. The method of claim 20, wherein the step of removing said portion of said substrate molding material includes removing a corresponding portion of at least one of said chips.

22. The method of claim 20, further including the final steps of stacking said integrated circuit module with at least one additional integrated circuit module;

and interconnecting at least one contact pad of said integrated circuit module with at least one contact pad of said at least one additional integrated circuit module.

23. The method of claim 22, wherein the step of providing a pattern of electrical conductors further includes forming edge contact pads and wherein the step of interconnecting said at least one contact pad of said integrated circuit module with said at least one contact pad of said at least one additional integrated circuit module comprises:

bonding an edge dielectric layer to at least one side of said stacked module having said edge contacts exposed thereon;

forming a plurality of side vias through said edge dielectric layer in alignment with at least some of said edge contact pads; and

depositing a conductive metal track structure on said edge dielectric layer on said at least one side of said stacked module to provide electrical connection between at least some of said edge contact pads through said side vias.

24. The method of claim 22, further including the step of positioning electrically conductive substrate pins in predetermined locations on said base prior to adding said substrate molding material within said mold form;

and

wherein the step of stacking said integrated circuit module with at least one additional integrated circuit module includes aligning predetermined substrate pins of said at least one additional integrated circuit module with predetermined portions of said pattern of electrical conductors of said integrated circuit module.

25. A method of fabricating an integrated circuit module substrate on a base, comprising the steps of:

applying an insulative base sheet over said base, said base sheet comprising a polymer film having an adhesive coating situated on the side of the polymer film opposite said base;

placing a plurality of chips having contact pads face down on said base sheet;

positioning a mold form around said chips;

adding substrate molding material within said mold form;

hardening said substrate molding material;

separating said substrate molding material and said chips from said base sheet and base;

applying a dielectric layer over said chips and said substrate molding material;

forming a plurality of vias through said dielectric layer, some of said plurality of vias being aligned with predetermined ones of said contact pads; and

providing a pattern of electrical conductors extending through selected ones of said plurality of vias in said dielectric layer to form an integrated circuit module.

26. The method of claim 25, wherein said substrate molding material comprises plastic.

27. The method of claim 26, wherein said molding material includes therein filler material selected from the group consisting of glass, SiC, AlN, diamond, graphite, Al₂ O₃, and metal.

28. The method of claim 25, further including the step of applying an inner dielectric layer over the backside of said chips and said base sheet prior to providing said mold form.

29. The method of claim 28, further including the steps of providing an electrically conductive strip on said inner dielectric layer prior to applying said inner dielectric layer over said chips and wherein said conductive strip is applied onto a region that extends from a portion of the backside of at least one of said chips to a portion of said base sheet.

30. The method of claim 29, further including the final step of providing an electrical connection from said electrically conductive strip to one of the group consisting of a voltage source and ground.

31. The method of claim 25, further including the step of removing a portion of at least one of said chips and of said substrate molding material after hardening said substrate molding material.

32. The method of claim 31, further including the final steps of stacking said integrated circuit module with at least one additional integrated circuit module;

and interconnecting at least one contact pad of said integrated circuit module with at least one contact pad of said at least one additional integrated circuit module.

33. A method of fabricating an integrated circuit module substrate on a base, comprising the steps of:

applying an insulative base sheet over said base, said base sheet comprising an adhesive layer;

placing a plurality of chips having contact pads face down on said base sheet;

positioning a mold form around said chips;

adding substrate molding material within said mold form;

hardening said substrate molding material;

separating said substrate molding material and said adhesive layer from said base;

applying a dielectric layer over said adhesive layer;

forming a plurality of vias through said dielectric layer, some of said plurality of vias being aligned with predetermined ones of said contact pads; and

providing a pattern of electrical conductors extending through selected ones of said plurality of vias in said dielectric layer to form an integrated circuit module.

34. The method of claim 33, wherein said substrate molding material comprises plastic.

35. The method of claim 34, wherein said molding material includes therein filler material selected from the group consisting of glass, SiC, AlN, diamond, graphite, Al₂ 0₃ and metal.

36. The method of claim 33, further including the step of applying an inner dielectric layer over the backside of said chips and said base sheet prior to providing said mold form.

37. The method of claim 36, further including the steps of providing an electrically conductive strip on said inner dielectric layer prior to applying said inner dielectric layer over said chips and wherein said conductive strip is applied onto a region that extends from a portion of the backside of at least one of said chips to a portion of said base sheet.

38. The method of claim 33, further including the step of removing a portion of at least one of said chips and of said substrate molding material after hardening said substrate molding material.

39. The method of claim 38, further including the final steps of stacking said integrated circuit module with at least one additional integrated circuit module;

and interconnecting at least one contact pad of said integrated circuit module with at least one contact pad of said at least one additional integrated circuit module.

40. A method of fabricating an integrated circuit module substrate on a base, comprising the steps of:

applying an insulative base sheet over said base, said base sheet comprising a polymer film having an adhesive coating situated on the side of the polymer film opposite said base;

placing a chip having contact pads face down on said base sheet;

positioning a mold form around said chip;

adding substrate molding material within said mold form;

hardening said substrate molding material;

separating said base sheet from said base;

forming a plurality of vias through said base sheet, some of said plurality of vias being aligned with predetermined ones of said contact pads; and

providing a pattern of electrical conductors extending through selected ones of said plurality of vias in said base sheet.

41. A method of fabricating an integrated circuit module substrate, comprising the steps of:

placing a plurality of chips having contact pads face down on a vacuum plate;

applying a continuous vacuum to said vacuum plate;

positioning a mold form around said chips;

adding substrate molding material within said mold form;

hardening said substrate molding material;

separating said substrate molding material and said chips from said vacuum plate;

applying a dielectric layer over said chips and said substrate molding material;

forming a plurality of vias through said dielectric layer, some of said plurality of vias being aligned with predetermined ones of said contact pads; and

providing a pattern of electrical conductors extending through selected ones of said plurality of vias in said dielectric layer to form an integrated circuit module.

42. The method of claim 41, further including the step of applying an inner dielectric layer over the backside of said chips and said vacuum plate prior to providing said mold form.

43. The method of claim 41, wherein said vacuum plate comprises a compliant vacuum plate and wherein the step of placing said plurality of chips on said compliant vacuum plate comprises:

placing said plurality of chips face up on a rigid vacuum plate;

applying a continuous vacuum to said rigid vacuum plate;

pressing said compliant vacuum plate on the faces of said plurality of chips;

releasing the continuous vacuum from said rigid vacuum plate; and

removing said rigid vacuum plate from said plurality of chips.

44. The method of claim 43, wherein said rigid vacuum plate comprises stainless steel.

45. The method of claim 43, wherein said compliant vacuum plate comprises silicone rubber.

46. The method of claim 41, further including the step of removing a portion of at least one of said chips and of said substrate molding material after hardening said substrate molding material.