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Membrane dielectric isolation IC fabrication

  • US 5,354,695 A
  • Filed: 04/08/1992
  • Issued: 10/11/1994
  • Est. Priority Date: 04/08/1992
  • Status: Expired due to Term
First Claim
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1. A method of making an integrated circuit comprising the steps of:

  • forming a substrate having a thickness of less than about 50 μ

    m;

    forming semiconductor devices on a principal surface of the substrate;

    depositing a low stress insulating membrane over the semiconductor devices wherein said insulating membrane has a net surface tensile stress level 2-100 times less than a fracture strength of the insulating membrane material; and

    forming electrical interconnections in the membrane extending between the semiconductor devices.

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