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High speed bus system

  • US 5,355,391 A
  • Filed: 03/06/1992
  • Issued: 10/11/1994
  • Est. Priority Date: 03/06/1992
  • Status: Expired due to Term
First Claim
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1. A high speed bus system for coupling at least one master device to at least one slave device, said bus comprising at least one transmission line for transmission of signals, said master device and said slave device coupled to the transmission line;

  • each master device and slave device comprising a bus driver and bus receiver;

    said bus driver comprising a current mode source to drive current along the transmission line,said bus receiver comprising at least one sampler/amplifier circuits which sample the received signal and amplify the signal from a small swing voltage level to a large swing voltage level compatible with the device coupled to the receiver, each of said sampler/amplifier circuits comprising,a first stage sampler circuit for sampling the received signal,a second stage amplifier circuit for amplifying the received signal to a voltage level compatible with the device coupled to the receiver, said second stage electrically isolated from the first stage, andmeans for transferring the sampled received signal from the first stage to the second stage;

    whereby the parasitic capacitive charge that is back injected onto the transmission line by the first stage sampler circuit is minimized by maintaining a small swing signal at the first stage and transferring the sampled small swing signal to the isolated second stage prior to amplifying the small swing signal to a large swing signal and the signal received by the bus receiver is output rapidly in a form compatible with the device coupled to the bus receiver.

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