Data compression controller

• US 5,357,614 A
• Filed: 09/17/1992
• Issued: 10/18/1994
• Est. Priority Date: 09/17/1992
• Status: Expired due to Fees

• Current Assignee: Tecmar Technologies, Inc. (Corporate Resource Services, Inc.)
• Original Assignee: Rexon/Tecmar, Inc.
• Inventors: DalSanto, Gary T., Pattisam, Ravi
• Primary Examiner(s): Shaw, Dale M.
• Assistant Examiner(s): Meky, Moustafa M.
• Application Number:
  US07/946,763
• Time in Patent Office: 761 Days
• Field of Search: 358/261.1, 358/261.2, 358/261.3, 358/300, 358/430, 358/444, 364/260.6, 341/51, 341/59, 341/60, 341/61, 341/81, 341/82, 341/87, 341/95, 341/106, 395/250, 395/275, 395/425
• US Class Current: 710/68
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0682 Tape device
• CPC Class Codes: G11B 20/00007 Time or data compression or expansion audio compression based on psychoacoustics G10L19/00; data processing for reproducing audio data at different playback speeds G10L21/04; video compression H04N19/00; data compression per se H03M7/30
• CPC Class Codes: G11B 20/10 Digital recording or reproducing
• CPC Class Codes: H03M 7/30 Compression speech analysis-synthesis for redundancy reduction G10L19/00; for image communication H04N; Expansion; Suppression of unnecessary data, e.g. redundancy reduction

Abstract

A data compression controller for processing data between a host system and at least one device is disclosed. The data compression controller comprises a compression coprocessor for converting data between first format and second format at a determined controller ratio. The compression has two buffers for storing data of the first and second formats. When data is to be compressed, the coprocessor receives data directly from the host system into the first buffer. The coprocessor reads the buffered data and compresses the data for output to the external device through the second buffer. A coprocessor interface is coupled to the coprocessor for monitoring the buffers to determine the state of the buffers and the coprocessor; for example, if the such that the data to be compressed flows smoothly and consistently through the coprocessor. The input/output (I/O) controller is coupled to the coprocessor and the device for transferring data between the second buffer and the device. The I/O controller interface monitors the state of the I/O controller and provides the necessary control signals to indicate when to begin the transfer of compressed data to the device. In addition, the I/O controller interface configures and controls the I/O controller according to the device. Therefore, a single An application interface is coupled to the host system, for decoding commands from the host system, and issuing corresponding signals to the components of the controller to execute the commands. The application interface monitors the status of the controller through the I/O controller interface and the coprocessor interface and provides status information to the host system such that the host timely provides data to the coprocessor and the necessary commands to the application interface to maintain continuous movement of data through the coprocessor.

Claims

1. A data compression controller for streaming data transfers between a host system and at least one device, said host system coupled to said controller through a host channel, said data compression controller comprising:

first buffer means for storing data of first format;

second buffer means for storing data of second format;

compression coprocessor coupled to said first buffer means and said second buffer means for converting data between said first format and second format at a determined compression ratio, said compression coprocessor maintaining a compression history corresponding to data of said first and second formats, said compression coprocessor generating a first completion interrupt upon completion;

input/output (I/O) means coupled to said second buffer means for transferring data of said second format between said device and said second buffer means, said I/O means generating a second interrupt upon completion;

compression coprocessor interface means coupled to said compression coprocessor for initiating transfer of one of said data of first and second formats into said compression coprocessor, said compression coprocessor interface means also causing the output of said compression coprocessor to be coupled to one of said second and first buffer means, respectively, said compression coprocessor interface means monitoring said compression coprocessor and transferring said first completion interrupt when said compression coprocessor is completed;

application interface means coupled to said host channel, said application interface means communicating with said host system for loading and unloading said first buffer means and second buffer means, said application interface means monitoring said first buffer means and issuing a third completion interrupt when said first buffer means is filled to a predetermined level, said application interface means also monitoring said second buffer means and issuing a fourth completion interrupt when said second buffer means is filled to a predetermined level;

I/O interface means for transferring said data of second format between said I/O means and said device, said I/O interface means coupling said I/O means to said device when said second buffer means is filled to said predetermined level, said I/O interface means monitoring said I/O means and transferring said second interrupt;

processor means for performing multitasking among said compression compressor, said first buffer means, said second buffer means, said host channel and said I/O means responsive to one of said first, second, third, and fourth completion interrupts received, said processor means performing formatting and error checking of data of said second format in said second buffer means; and

program memory means coupled to said processor means and said compression compressor, said program memory storing a predetermined operating system for operating said processor means, said program memory means storing one of a plurality of predetermined device drivers unique to said device coupled to said host system for driving said device.

2. A data compression controller according to claim 1 further comprising:

flash memory coupled to said processor means for storing said predetermined operating system and said plurality of predetermined device drivers to uploading onto said program memory means.

3. A data compression controller according to claim 2, further comprising:

bootstrap loader means coupled to said flash memory for booting up said data controller by causing said flash memory to upload to said program memory means upon power up, said bootstrap loader means then disabling said flash memory and passing control to said application interface means for monitoring said host channel.

4. A data compression controller according to claim 2, wherein said I/O means is a SCSI device for transferring data between said data compression controller and said device.

5. A data compression controller according to claim 4, further comprising bypass means coupled to said processor means, said first buffer means, and said second buffer means for transferring data of said first format directly to said second buffer means when data of said first format is already in a compressed format.

6. A data compression controller according to claim 5, wherein said compression coprocessor comprises a compression history memory for storing a plurality of compression and de-compression histories corresponding to data of said first format and its corresponding data of second format.

7. A data compression controller according to claim 6, wherein said first buffer means comprises a double buffer memory for concurrently loading a first buffer while unloading a second buffer.

8. A data compression controller according to claim 4, wherein said flash memory stores said predetermined operating system and said plurality of predetermined device drivers in compressed format.

9. A data compression controller according to claim 8, wherein said bootstrap loader means uploads said predetermined operating system and said plurality of predetermined device drivers onto said program memory means.

10. In a computer system, a method for performing a data compression and transferring data between a host system and at least one external device through a data compression controller, said method comprising the steps of:

transferring data from the host memory to an input buffer of a compression controller comprising a compression compressor until the transfer is complete or the input buffer is full;

issuing a compression coprocessor interrupt to the microprocessor of the compression controller when the transfer is complete or the input buffer is approximately full;

upon receipt of the compression coprocessor interrupt, the microprocessor controlling compression coprocessor of the compression controller to read the data from the input buffer, compress the data and store the compressed data in an output buffer;

transferring header information into the output buffer such that header information is associated with each block of data stored in an output buffer;

issuing a completion interrupt to the microprocessor when the compression is complete or the output buffer is approximately full;

upon receipt of the completion interrupt, said microprocessor,

controlling an I/O controller to transferring data from the output buffer of the compression controller to the external device until the transfer is complete or the output buffer is empty, and

issuing an interrupt to the host to transfer additional data to the input buffer;

said microprocessor comparing a predetermined quantity of input data to the corresponding quantity of output data;

if the output data is greater than the input data, controlling the I/O controller to transfer the data of the input buffer to the external device;

wherein data is continuously loaded from the host system, compressed and stored in the external device.

11. The method according to claim 10 further comprising the step of:

said microprocessor monitoring the input buffer and issuing an interrupt to the host to transfer data to the input buffer when the input buffer is approximately empty and issuing an interrupt to the host to cease in the transfer of data to the input buffer when the input buffer is full.

12. The method according to claim 10 further comprising the step of:

said microprocessor monitoring the output buffer and issuing an command to the I/O to transfer data from the output to the external device when the output buffer contains a predetermined amount of data.

13. The method as set forth in claim 12, wherein the predetermined amount comprises an amount that is sufficient for efficient data streaming to the external device.