Multiple screen graphics display

• US 5,361,078 A
• Filed: 11/12/1992
• Issued: 11/01/1994
• Est. Priority Date: 02/16/1990
• Status: Expired due to Fees

• Current Assignee: Nadimelia Limited
• Original Assignee: Nadimelia Limited
• Inventors: Caine, Lester S.
• Primary Examiner(s): BRIER, JEFFERY A
• Application Number:
  US07/917,020
• Time in Patent Office: 719 Days
• Field of Search: 340/717, 345/1, 345/2, 345/903
• US Class Current: 345/1.3
• CPC Class Codes: G06F 3/1446 display composed of modules, e.g. video walls
• CPC Class Codes: G09G 2300/026 Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
• CPC Class Codes: G09G 2360/04 Display device controller operating with a plurality of display units
• CPC Class Codes: H04N 9/12 Picture reproducers H04N9/11 takes precedence

Abstract

A display system comprises a wall of video screens each driven by a respective video driver (24A-24D). Information to be displayed is supplied from a host computer (10) having conventional input/output devices (12,14). Each circuit board of the host computer serves a number of video channels and supplies the information to be displayed on each screen to an associated portion of random access memory (22A to 22E). Thus, each screen displays a portion of an image or the whole image when the video drivers read out data in parallel from the portions of memory (22A to 22E). The information displayed may be altered via the input devices (12, 14) to the host computer (10).

Claims

1. A display system comprising a host computer having a computer bus connected to a status register and to one input of a multiplexer, a coprocessor being connected to another input of the multiplexer, a random access memory mapped into a plurality of memory slots addressable by the host computer and each corresponding to a channel for a respective screen, each channel including a screen driver connected to the memory and operative to provide a video signal to the corresponding screen, wherein the host computer is capable of writing image data into any selected one of the memory slots and the screen drivers read image data out of the memory slots in parallel to provide simultaneous video signals for display on corresponding screens, wherein the multiplexer is controlled from the status register to select which of the host computer and coprocessor accessed the memory, and wherein the resolution of each screen is independent of the number of screen comprising the display.

2. A display system according to claim 1, wherein the host computer and the screen drivers access the memory in time-multiplexed manner.

3. A display system according to claim 2, wherein the time multiplexing is controlled by a synchronising generator independently of the host computer clock cycle.

4. A display system according to claim 1, wherein each memory slot includes a plurality of image pages and wherein

the host computer has a computer bus connected to a status register storing data determining which page is displayed via each image driver.