Preamplifier for optical communication having a gain control circuit

• US 5,363,064 A
• Filed: 04/22/1993
• Issued: 11/08/1994
• Est. Priority Date: 04/24/1992
• Status: Expired due to Fees

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Mikamura, Yasuki
• Primary Examiner(s): MOTTOLA, STEVEN J
• Application Number:
  US08/050,621
• Time in Patent Office: 565 Days
• Field of Search: 250/214 A, 250/214 AG, 330/59, 330/110, 330/308, 359/189, 359/194
• US Class Current: 330/308
• CPC Class Codes: H03F 1/342 in field-effect transistor amplifiers
• CPC Class Codes: H03F 3/082 with FET's H03F3/085 takes precedence
• CPC Class Codes: H03G 3/3084 in receivers or transmitters for electromagnetic waves other than radiowaves, e.g. lightwaves H03G3/32, H03G3/34 take precedence

Abstract

A phase-inverting amplifier includes an input-stage FET, a load thereof and a gain control circuit. The gain control circuit is provided in parallel with the load, and reduces an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a predetermined value. The gain control circuit is typically a FET whose gate is biased at a constant voltage. A feedback resistor is provided in a negative feedback path of the phase-inverting amplifier. A bypass circuit is provided in parallel with the feedback resistor, and reduces an effective feedback resistance when a feedback quantity exceeds a predetermined value.

Claims

1. A preamplifier for optical communication that amplifies an input signal produced by a photodetector, comprising:

a phase-inverting amplifier including an input-state FET and a load thereof, for amplifying the input signal;

gain control means for increasing a bandwidth for the preamplifier so that the preamplifier bandwidth remains wider than a bandwidth of an optical receiver which includes the preamplifier, the increase being achieved by reducing an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value;

a feedback resistor provided in a negative feedback path of the phase-inverting amplifier; and

bypass means for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value.

2. The preamplifier of claim 1, wherein the gain control means comprises a gain-control FET, a source and a drain of the gain-control FET being connected to respective terminals of the load, and a gate of the gain-control FET being biased at a constant voltage.

3. The preamplifier of claim 1, wherein the gain control means comprises a diode provided in parallel with the load.

4. The preamplifier of claim 1, wherein the bypass means comprises a diode which is provided in parallel with the feedback resistor.

12. The preamplifier of claim 1, wherein FETs used in the phase-inverting amplifier and the bypass means are GaAs MESFETs.

5. A preamplifier for optical communication that amplifies an input signal produced by a photodetector, comprising:

a phase-inverting amplifier including an input-state FET and a load thereof, for amplifying the input signal;

gain control means for reducing an effective load and resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value;

a feedback resistor provided in a negative feedback path of the phase-inverting amplifier; and

bypass means for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value, wherein the bypass means comprises an enhancement-type FET, a drain and a gate of the enhancement-type FET being connected to one terminal of the feedback resistor and a source of the enhancement-type FET being connected to the other terminal of the feedback resistor.

6. A preamplifier for optical communication that amplifies an input signal produced by a photodetector, comprising:

a phase-inverting amplifier including an input-state FET and a load thereof, for amplifying the input signal;

gain control means for reducing an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value;

a feedback resistor provided in a negative feedback path of the phase-inverting amplifier; and

bypass means for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value, wherein the bypass means comprises a depletion-type FET, a drain and a source of the depletion-type FET being connected to respective terminals of the feedback resistor, and a gate of the depletion-type FET being biased at a constant voltage.

7. A preamplifier for optical communication that amplifies an input signal produced by a photodetector, comprising:

a phase-inverting amplifier including an input-state FET and a load thereof, for amplifying the input signal;

gain control means for reducing an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value;

a feedback resistor provided in a negative feedback path of the phase-inverting amplifier; and

bypass means for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value, wherein the bypass means comprises a depletion-type FET, a drain and a source of the depletion-type FET being connected to respective terminals of the feedback resistor, and a gate of the depletion-type FET being controlled by an output signal of the phase-inverting amplifier.

8. A preamplifier for optical communication that amplifies an input signal produced by a photodetector, comprising:

a phase-inverting amplifier including an input-state FET and a load thereof, for amplifying the input signal;

voltage dividing means for dividing an output signal of the phase-inverting amplifier;

gain control means for reducing an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value;

a feedback resistor provided in a negative feedback path of the, phase-inverting amplifier; and

bypass means for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value, wherein the bypass means comprises a depletion-type FET, a drain and a source of the depletion-type FET being connected to respective terminals of the feedback resistor, and a gate of the depletion-type FET being controlled by the divided output signal of the voltage dividing means.

9. The preamplifier of claim 8, wherein the voltage dividing means comprises a FET for source-following the output signal, and resistors for dividing the source-followered output signal.

10. The preamplifier of claim 8, wherein the voltage dividing means comprises a FET for source-following the output signal, and a second depletion-type FET, a gate and a source of the second depletion-type FET being connected to each other and a drain of the second depletion-type FET being connected to a source of the source-following FET.

11. The preamplifier of claim 9, wherein the voltage dividing means comprises a second depletion-type FET provided in parallel with one of the resistors, a gate and a source of the second depletion-type FET being connected to each other, and the divided output signal appearing at a drain of the second depletion-type FET.