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Circuit for driving two power mosfets in a half-bridge configuration

  • US 5,365,118 A
  • Filed: 06/04/1992
  • Issued: 11/15/1994
  • Est. Priority Date: 06/04/1992
  • Status: Expired due to Term
First Claim
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1. A circuit for alternately driving first and second transistors, each transistor having a control terminal for receiving a transistor drive signal, at least one of said transistor having a terminal coupled to an output terminal adapted to be coupled to a load and to a bootstrap capacitor charged to provide a boosted drive voltage to the first transistor, said circuit comprising:

  • a driver input adapted for receiving a driver input signal having a first state intended to turn the first transistor ON and the second transistor OFF, and a second state intended to turn the first transistor OFF and the second transistor ON;

    means for monitoring the first transistor to generate a first signal indicative of the first transistor being in an operational state that can be considered substantially OFF;

    means for monitoring the second transistor to generate a second signal indicative of the second transistor being in an operational state that can be considered substantially OFF;

    means for monitoring the voltage at the output terminal to generate a recharge signal when the output voltage is below a predetermined voltage level; and

    means coupled to the control terminals of the first and second transistors for driving the transistors in response to the driver input signal, the recharge signal and the first and second signals, so that (1) the first transistor is prevented from being driven ON until the driver input signal is in the first state and the second and recharge signals are also present, and (2) the second transistor is prevented from being driven ON until the driver input signal is in the second state and the first signal is also present,whereby the drive to the first transistor is inhibited until the second transistor is considered to be substantially OFF and the bootstrap capacitor has had time to charge sufficiently to provide at least a predetermined boost to the first transistor drive voltage, and the drive to the second transistor is inhibited until the first transistor is considered to be substantially OFF.

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