Image signal processor generating reduced memory consumption still images yet preserving image quality

• US 5,365,346 A
• Filed: 10/30/1992
• Issued: 11/15/1994
• Est. Priority Date: 03/16/1987
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Abumi, Takao
• Primary Examiner(s): Powell, Mark R.
• Assistant Examiner(s): Miller, John W.
• Application Number:
  US07/969,443
• Time in Patent Office: 746 Days
• Field of Search: 358/21 R, 358/160, 358/13, 358/17, 358/19, 358/455, 358/22, 340/793
• US Class Current: 348/708
• CPC Class Codes: H04N 1/646 Transmitting or storing colour television type signals, e.g. PAL, Lab; Their conversion into additive or subtractive colour signals or vice versa therefor H04N1/642, H04N1/644 take precedence
• CPC Class Codes: H04N 21/4143 embedded in a Personal Computer [PC]
• CPC Class Codes: H04N 5/4448 for frame-grabbing
• CPC Class Codes: H04N 9/64 Circuits for processing colour signals H04N9/77 takes precedence; camera processing pipelines for processing colour signals H04N23/84

Abstract

An intermediate gradation generator filters out a direct current component of a clock pulse and then superimposes the filtered clock pulse on average levels of a luminance signal.

Claims

1. An image signal processor comprising:

converting means for demodulating a composite color video signal into color difference signals and for matrixing the difference signals with the composite color video signal so as to cause the color difference signals to be converted into respective primary color signals having carrier color signal components superimposed thereon;

a digitizing circuit for digitizing an output from said converting means at a threshold level;

a clock pulse generating circuit for generating clock pulses synchronized with a color burst signal included in the composite color video signal and having a frequency n times the frequency of the color burst signal, wherein n represents a positive integer not smaller than 2; and

memory means for sampling and storing an output from said digitizing circuit when the clock pulses from said clock pulse generating circuit are applied as sampling clock pulses.

2. An image signal processor comprising:

clock pulse generating means for generating first clock pulses and also for generating second clock pulses synchronized with the first clock pulses and having a frequency n times the frequency of the first clock pulses, wherein n represents a positive integer not smaller than 2;

quasi-intermediate color generating means for superimposing the first clock pulses on a given image signal to provide a superimposed image signal and also for digitizing the superimposed image signal to provide a digitized signal; and

memory means for sampling and storing the digitized signal from said quasi-intermediate color generating means when the second clock pulses from said clock pulse generating means are applied as sampling clock pulses.

3. An image signal processor as in claim 2, wherein:

said first clock pulses are superimposed on a portion of said given image signal, said portion being substantially equal to an average level of said given image signal.

4. An image signal processor comprising:

quasi-intermediate color generating means for superimposing clock signals on a luminance signal,

a clock pulse superimposing circuit having a direct current inhibiting means for cutting off a direct current component contained in the clock pulses; and

a matrix circuit for summing the superimposed luminance signal and color difference signals together to provide an added output.

5. The image signal processor as claimed in claim 4, further comprising:

an analog-to-digital converting circuit for digitizing the added output.

6. An image signal processor as in claim 4, wherein said direct current inhibiting means comprises a capacitor.

7. An image signal processor as in claim 6, wherein said clock pulse superimposing circuit further includes:

a transistor having a base to which a luminance signal is applied and to which the clock pulses are applied through the direct current inhibiting means, said transistor having a collector from which a superimposed luminance signal which corresponds to the luminance signal superimposed with the clock pulses is outputted.

8. An image signal processor comprising:

a direct current amplifier for receiving an image signal descriptive of a still picture and clock pulses, a direct current component of said clock pulses having been cut off previously, and operable to superimpose said clock pulses on a portion of the image signal;

an analog-to-digital converter for sampling an output from said direct current amplifier circuit at a timing smaller than the cycle of the clock pulses and thereafter converting the sampled output into a digital signal; and

memory means for storing the digital signal outputted from said converter circuit.

9. An image signal processor as in claim 8, wherein:

said portion of said image signal, upon which said clock pulses are superimposed, being substantially equal to an average level of said image signal.