Structure and method for programming antifuses in an integrated circuit array
First Claim
1. A structure for programming an array of antifuses in an integrated circuit structure comprising:
- a set of programming voltage lines to which programming voltages can be applied;
a plurality of antifuses;
a plurality of interconnect line segments, each connected to one terminal of at least one of said antifuses; and
means for selectively connecting each of said interconnect line segments to one of said programming voltage lines and applying a known voltage difference across each of said antifuses regardless of the states of other antifuses.
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Accused Products
Abstract
This invention provides a structure and method for interconnecting logic devices through line segments which can be joined by programming antifuses. One of several programming lines can be connected through an interconnect line segment to each terminal of each antifuse in the array. Interconnect line segments connected to opposite terminals of the same antifuse are connected to a different programming line in order to be able to apply different voltages to the two terminals of the antifuse. An addressing structure selectively connects interconnect line segments to their respective programming lines, and programming voltages applied to the programming lines cause a selected antifuse to be programmed. A novel addressing feature sequentially addresses two transistors for the line segments to be connected, and takes advantage of a capacitive pumped decoder to maintain the addressed transistors turned on while programming voltages are applied. The structure also allows for testing of logic devices by applying test voltages to the programming voltage lines and/or sensing logic device output on programming voltage lines. The structure and method also permit measuring resistance of the programmed antifuses. No separate testing overhead structure is needed.
81 Citations
18 Claims
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1. A structure for programming an array of antifuses in an integrated circuit structure comprising:
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a set of programming voltage lines to which programming voltages can be applied; a plurality of antifuses; a plurality of interconnect line segments, each connected to one terminal of at least one of said antifuses; and means for selectively connecting each of said interconnect line segments to one of said programming voltage lines and applying a known voltage difference across each of said antifuses regardless of the states of other antifuses. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A structure for programming an array of antifuses comprising:
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a set of programming voltage lines to which programming voltages can be applied; a plurality of antifuses; connecting means for connecting a different one of the programming voltage lines to each terminal of an antifuse; and pumping means connected to each of the connecting means for causing the programming voltages to be applied to the terminals of the antifuse.
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9. A method for programming an antifuse in an integrated circuit structure comprising the steps of:
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addressing an interconnect line attached to a first terminal of said antifuse, thereby causing said first terminal to be connected to a first programming voltage line; addressing an interconnect line attached to a second terminal of said antifuse, thereby causing said second terminal to be connected to a second programming voltage line; simultaneously applying a first programming voltage to said first programming voltage line and a second programming voltage to said second programming voltage line, thereby causing said antifuse to become permanently conductive. - View Dependent Claims (10, 11, 12, 13, 14)
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15. In an integrated circuit structure in which antifuses may connect interconnect line segments to a logic device through direct connect line segments connected directly to said logic device and in which programming voltages may be applied through programming voltage lines to said interconnect line segments for programming said antifuses, a method for testing said logic device without programming said antifuses comprising the steps of:
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causing some of said direct connect line segments connected to said logic device to be connected to corresponding programming voltage lines; and applying test voltages to at least one of said programming voltage lines and observing voltages placed by said logic device on at least one of said programming voltage lines. - View Dependent Claims (16)
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17. A method for determining programmed resistance of an antifuse in a structure having
a plurality of antifuses each positioned between a pair of programming transistors, each pair of programming transistors programmably connecting a corresponding antifuse between programming voltage sources, and at least one pair of measurement transistors formed to be like said programming transistors and connected in series between said programming voltage sources without an intervening antifuse, comprising the steps of: - programming said antifuse;
applying a voltage difference between said programming voltage sources sufficiently low to cause said measurement transistors to operate in their linear range; turning on said measurement transistors; measuring current through said measurement transistors and calculating resistance of said measurement transistors; turning on programming transistors connecting said antifuse to said programming voltage sources; measuring current through said programming transistors and said antifuse; and calculating resistance of said antifuse assuming said programming transistors have resistance equal to that of said measurement transistors.
- programming said antifuse;
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18. A structure for measuring resistance in a programmed antifuse in an array of antifuses in an integrated circuit structure comprising:
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a set of programming voltage lines to which programming voltage can be applied; a plurality of antifuses; for each antifuse a first programming voltage transistor for programmably connecting a first terminal of said antifuse to a first one of said programming voltage lines, and a second programming voltage transistor for programmably connecting a second terminal of said antifuse to a second one of said programming voltage lines; at least one pair of measurement transistors connected in series between two of said programming voltage lines, said measurement transistors being manufactured to have the same resistance characteristics as said programming transistors; whereby resistance of said measurement transistors can be measured and used as a reliable estimate of resistance of said programming transistors.
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Specification