Burst signal transmitter

• US 5,369,789 A
• Filed: 01/28/1994
• Issued: 11/29/1994
• Est. Priority Date: 10/01/1991
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Matsumoto, Takayuki, Enoki, Takashi, Kosugi, Hiroaki
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): VO, NGUYEN THANH
• Application Number:
  US08/188,115
• Time in Patent Office: 305 Days
• Field of Search: 455/12.1, 455/115, 455/117, 455/127, 455/126, 455/343, 455/89, 455/249, 455/69, 455/91, 455/116, 330/129, 330/131, 330/141
• US Class Current: 455/126
• CPC Class Codes: H03G 3/3047 for intermittent signals, e.g. burst signals
• CPC Class Codes: H04L 27/36 Modulator circuits; Transmitter circuits

Abstract

A power amplifier amplifies a modulated carrier signal having an amplitude modulation component and a phase modulation component to generate a transmission signal. Part of the transmission signal is extracted by a monitor circuit. The detection signal detected by an envelope detector is compared with a burst control signal by a differential amplifier. The resulting error signal is input to a gain control terminal of a power amplifier through a sample and hold circuit, thus forming a feed-back loop. The sample and hold circuit outputs a sample signal during the transmission signal ramping-up and ramping-down periods, thus effectively turning ON the feed-back loop to an ON to control the transmission signal ramping-up and ramping-down. The sample and hold circuit outputs the hold signal during a modulated data transmission period, effectively turning OFF the feedback loop. As a result, a burst transmission output with a stable transmission power level can be obtained.

Claims

1. A transmitter comprising:

a modulator for generating a modulation carrier signal, and generating a signal during a burst ramp-up period for use as a constant envelope;

a power amplifier, comprising a gain control terminal, for amplifying said modulation carrier signal and producing an amplified transmission signal;

a monitor circuit for extracting a part of said amplified transmission signal;

an envelope detector for obtaining an envelope detection signal of the monitor signal;

a first burst control signal generator for generating a first burst control signal;

a differential amplifier for comparing said first burst control signal and said envelope detection signal, and producing an error signal indicative of a difference between said first burst control signal and said envelope detection signal;

a sample and hold signal generator for generating a sample and hold signal;

a sample and hold circuit for sampling and holding said error signal according to the sample and hold signal to produce a gain control signal which is supplied to said gain control terminal of the power amplifier; and

a timing controller for providing trigger signals to said first burst control signal generator and to said sample and hold signal generator;

wherein said first burst control signal generator comprises;

a first digital counter for starting and ending counting in response to the trigger signals;

a read only memory connected to said first digital counter for generating predetermined rising and falling patterns in digital form for the first burst control signal;

a digital to analog converter for converting the rising and falling patterns in digital form to rising and falling patterns in analog form; and

a low pass filter for smoothing the rising and falling patterns in analog form;

and wherein said sample and hold signal generator comprises a second digital counter for starting and ending counting in response to the trigger signals;

and wherein said sample and hold signal generator generates said sample and hold signal such that said signal is in a sampling state during a burst rising period and a burst falling period and is in a hold state during a burst transmission period and samples a rising pattern during said burst rising period and holds a last level of said rising pattern during said transmission period and samples a falling pattern during said burst falling period.

2. A transmitter according to claim 1, further comprising a second burst control signal generator for generating a second burst control signal, and wherein said power amplifier comprises a first amplifier for receiving said modulation carrier signal and having another gain control terminal for receiving said second burst control signal and a second amplifier whose input is connected to an output of said first amplifier and having said gain control terminal for receiving said gain control signal;

wherein said second burst control signal generator comprises;

a third digital counter for starting and ending counting in response to the trigger signals;

another read only memory connected to said third digital counter for generating predetermined rising and falling patterns in digital form for the second burst control signal;

another digital to analog converter for converting the rising and falling patterns in digital form to rising and falling patterns in analog form; and

another low pass filter for smoothing the rising and falling patterns in analog form;

and wherein a burst is just dropped by said second burst control signal in a first half of a trailing edge of the burst and is then dropped by said first burst control signal while said sample and hold signal remains in a sampling state during a latter half of a trailing edge of the burst;

and wherein said second burst control signal generator generates said second burst control signal such that said second burst control signal samples a rising pattern during a first half of said burst rising period and holds a last level of said rising pattern during a second half of said burst rising period and during said transmission period and samples said falling pattern during a first half of said burst falling period and holds a last level of said falling pattern during a second half of said burst falling period.

3. A transmitter comprising:

a modulator for generating a modulation carrier signal, and generating a signal during a burst ramp-up period for use as a constant envelope;

a power amplifier, comprising a gain control terminal, for amplifying said modulation carrier signal and producing an amplified transmission signal;

a monitor circuit for extracting a part of said amplified transmission signal;

an envelope detector for obtaining an envelope detection signal of the monitor signal;

a first burst control signal generator for generating a first burst control signal;

a differential amplifier for comparing said first burst control signal and said envelope detection signal, and producing an error signal indicative of a difference between said first burst control signal and said envelope detection signal;

a sample and hold signal generator for generating a sample and hold signal;

a sample and hold circuit for sampling and holding said error signal according to the sample and hold signal to produce a gain control signal which is supplied to said gain control terminal of the power amplifier; and

a timing controller for providing trigger signals to said first burst control signal generator and to said sample and hold signal generator;

wherein said first burst control signal generator comprises;

a first digital counter for starting and ending counting in response to the trigger signals;

a read only memory connected to said first digital counter for generating predetermined rising and falling patterns in digital form for the first burst control signal;

a digital to analog converter for converting the rising and falling patterns in digital form to rising and falling patterns in analog form; and

a low pass filter for smoothing the rising and falling patterns in analog form;

and wherein said sample and hold signal generator comprises a second digital counter for starting and ending counting in response to the trigger signals;

said transmitter further comprising;

a burst ramping-down signal generator for generating a burst ramping-down signal; and

a multiplier provided between said sample and hold circuit and said power amplifier for multiplying said gain control signal from said sample and hold circuit by said burst ramping-down control signal to produce a multiplied gain control signal which is inputted to said gain control terminal of said power amplifier.

4. A transmitter according to claim 3, wherein said multiplier comprises a digital-to-analog converter whose output is connected to an input of a filter, and wherein said digital-to-analog converter of said multiplier receives the gain control signal from said sample and hold circuit as a reference voltage and converts said burst ramping-down control signal in a digital form to an amplified analog signal.

5. A transmitter comprising:

a modulator for generating a modulation carrier signal;

a power amplifier, comprising a gain control terminal, for amplifying said modulation carrier signal and producing an amplified transmission signal;

a monitor circuit for extracting a part of said amplified transmission signal;

an envelope detector for obtaining an envelope detection signal of the monitor signal;

a first burst control signal generator for generating a first burst control signal;

a modulation envelope signal generator for producing a modulation envelope signal;

a multiplier for multiplying said burst control signal by said modulation envelope signal to produce a multiplied burst control signal

a differential amplifier for comparing said multiplied burst control signal and said envelope detection signal, and producing an error signal indicative of a difference between said multiplied burst control signal and said envelope detection signal;

a sample and hold signal generator for generating a sample and hold signal;

a sample and hold circuit for sampling and holding said error signal according to the sample and hold signal to produce a gain control signal which is supplied to said gain control terminal of the power amplifier;

a timing controller for providing trigger signals to said first burst control signal generator and to said sample and hold signal generator;

wherein said first burst control signal generator comprises;

a first digital counter for starting and ending counting in response to the trigger signals;

a read only memory connected to said first digital counter for generating predetermined rising and falling patterns in digital form for the first burst control signal;

a digital to analog converter for converting the rising and falling patterns in digital form to rising and falling patterns in analog form; and

a low pass filter for smoothing the rising and falling patterns in analog form;

and wherein said sample and hold signal generator comprises a second digital counter for starting and ending counting in response to the trigger signals;

and wherein said sample and hold signal generator generates said sample and hold signal such that said signal is in a sampling state during a burst rising period and a burst falling period and is in a hold state during a burst transmission period and samples a rising pattern during said burst rising period and holds a last level of said rising pattern during said transmission period and samples a falling pattern during said burst falling period.

6. A transmitter comprising:

a modulator for generating a modulation carrier signal;

a power amplifier, comprising a gain control terminal, for amplifying said modulation carrier signal and producing an amplified transmission signal;

a monitor circuit for extracting a part of said amplified transmission signal;

an envelope detector for obtaining an envelope detection signal of the monitor signal;

a first burst control signal generator for generating a first burst control signal;

a modulation envelope signal generator for producing a modulation envelope signal;

a multiplier for multiplying said burst control signal by said modulation envelope signal to produce a multiplied burst control signal

a differential amplifier for comparing said multiplied burst control signal and said envelope detection signal, and producing an error signal indicative of a difference between said multiplied burst control signal and said envelope detection signal;

a sample and hold signal generator for generating a sample and hold signal;

a sample and hold circuit for sampling and holding said error signal according to the sample and hold signal to produce a gain control signal which is supplied to said gain control terminal of the power amplifier;

a timing controller for providing trigger signals to said first burst control signal generator and to said sample and hold signal generator;

wherein said first burst control signal generator comprises;

a first digital counter for starting and ending counting in response to the trigger signals;

a read only memory connected to said first digital counter for generating predetermined rising and falling patterns in digital form for the first burst control signal;

a digital to analog converter for converting the rising and falling patterns in digital form to rising and falling patterns in analog form; and

a low pass filter for smoothing the rising and falling patterns in analog form;

and wherein said sample and hold signal generator comprises a second digital counter for starting and ending counting in response to the trigger signals;

and wherein said multiplier comprises a digital-to-analog converter whose output is connected to an input of a filter, and wherein said digital-to-analog converter of said multiplier receives the modulation envelope signal as a reference voltage and converts said burst control signal in a digital form to an amplified analog signal.

7. A transmitter comprising:

a modulator for generating a modulation carrier signal, and generating a signal during a burst ramp-up period for use as a constant envelope;

a power amplifier, comprising a gain control terminal, for amplifying said modulation carrier signal and producing an amplified transmission signal;

a monitor circuit for extracting a part of said amplified transmission signal;

an envelope detector for obtaining an envelope detection signal of the monitor signal;

a first burst control signal generator for generating a first burst control signal;

a differential amplifier for comparing said first burst control signal and said envelope detection signal, and producing an error signal indicative of a difference between said first burst control signal and said envelope detection signal;

a sample and hold signal generator for generating a sample and hold signal;

a sample and hold circuit for sampling and holding said error signal according to the sample and hold signal to produce a gain control signal which is supplied to said gain control terminal of the power amplifier;

a burst ramping-down signal generator for generating a burst ramping-down signal; and

a multiplier provided between said sample and hold circuit and said power amplifier for multiplying said gain control signal from said sample and hold circuit by said burst ramping-down control signal to produce a multiplied gain control signal which is inputted to said gain control terminal of said power amplifier.

8. A transmitter according to claim 7, wherein said multiplier comprises a digital-to-analog converter whose output is connected to an input of a filter, and wherein said digital-to-analog converter receives the gain control signal from said sample-hold circuit as a reference voltage and converts said burst ramping-down control signal in a digital form to an amplified analog signal.

9. A transmitter comprising:

a modulator for generating a modulation carrier signal;

a power amplifier, comprising a gain control terminal, for amplifying said modulation carrier signal and producing an amplified transmission signal;

a monitor circuit for extracting a part of said amplified transmission signal;

an envelope detector for obtaining an envelope detection signal of the monitor signal;

a first burst control signal generator for generating a first burst control signal;

a modulation envelope signal generator for producing a modulation envelope signal;

a multiplier for multiplying said burst control signal by said modulation envelope signal to produce a multiplied burst control signal a differential amplifier for comparing said multiplied burst control signal and said envelope detection signal, and producing an error signal indicative of a difference between said multiplied burst control signal and said envelope detection signal;

a sample and hold signal generator for generator a sample and hold signal; and

a sample and hold circuit for sampling and holding said error signal according to the sample and hold signal to produce a gain control signal which is supplied to said gain control terminal of the power terminal;

wherein said multiplier comprises a digital-to-analog converter whose output is connected to an input of a filter, and wherein said digital-to-analog converter receives the modulation envelope signal as a reference voltage and converts said burst control signal in a digital form to an amplified analog signal.