Power management system for serial EEPROM device

• US 5,371,709 A
• Filed: 04/01/1993
• Issued: 12/06/1994
• Est. Priority Date: 04/01/1993
• Status: Expired due to Fees

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: Microchip Technology Incorporated
• Inventors: Fisher, Richard J., Alexander, Samuel E.
• Primary Examiner(s): LaRoche, Eugene R.
• Assistant Examiner(s): ZARABIAN, AMIR
• Application Number:
  US08/041,067
• Time in Patent Office: 614 Days
• Field of Search: 365/226, 365/227, 365/228, 365/229
• US Class Current: 365/226
• CPC Class Codes: G11C 16/225 Preventing erasure, programming or reading when power supply voltages are outside the required ranges
• CPC Class Codes: G11C 5/143 Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence

Abstract

Power consumption of a serial EEPROM is reduced while simultaneously precluding data corruption during write operations. These results are achieved by operating a brownout detector in the device to sense EEPROM supply voltage below a predetermined level and thereupon to place the EEPROM in a reduced power mode, but only during an interval that a write sequence is taking place. Such an interval includes loading of data in a temporary storage cache and writing the loaded data into the EEPROM. At the same time that the low voltage level is detected during a write sequence, any load or write operation then in progress is aborted. The brownout detector is intentionally left disabled or in a sleep mode during any read mode or standby mode since there is no jeopardy of corrupting the EEPROM memory during those times.

Claims

1. An erasable programmable memory device operating with a fixed supply voltage, comprising:

a plurality of addressable locations for storing dam,

means for programmably writing data to at least one of said locations as part of a write sequence of the device,

means for selectively reading data from at least one of said locations as part of a read sequence of said device,

brownout means for detecting when the supply voltage level is below a predetermined value, and in response, aborting current operation of the device, and

timing means for powering on the brownout detection means only during a write sequence of the device.

2. The device of claim 1, in which the brownout detection means includes means for placing the device in a power standby mode when the supply voltage level is below said predetermined value.

3. A battery powered electrically erasable programmable read only memory (EEPROM) semiconductor device, comprising:

a memory section composed of cells adapted to be programmably addressed for writing data therein and reading data therefrom during selected write and read sequences of the device operation, and

means operated only during a write sequence for detecting a predetermined low level of battery power to the device and thereupon aborting the write sequence in progress.

4. The invention of claim 3, in which:

the means for detecting includes means for placing the device in a reduced power mode upon detection of the predetermined low level of battery power.

5. A method of reducing power consumption while protecting against data corruption in a serial EEPROM having a supply voltage with a detectable level, which comprises:

detecting the level of the supply voltage of the EEPROM,

placing the EEPROM in a reduced power mode when the supply voltage level is below a predetermined level, and

performing said detecting of supply voltage level and lacing the EEPREOM in a reduced power mode only during an interval in which data is being written to the EEPROM.

6. The method of claim 5, in which said interval includes loading the data in a temporary storage cache, and writing the loaded data into the EEPROM.

7. The method of claim 5, further including aborting any operation in progress in the EEPROM during said interval in which the EEPROM is placed in the reduced power mode.

8. In a serial EEPROM semiconductor device having a memory array composed of cells adapted to be addressed for writing data to selected ones of the cells during selected write sequences and for reading data from selected ones of the cells during selected read sequences of the device operation, the improvement comprising:

control means, responsive when enabled, for detecting a power supply level to said device insufficient to sustain a faithful write of data to the selected cells during the selected write sequence, to thereupon abort the write sequence in progress so as to preclude data corruption of the memory array attributable to an incomplete write, and

activation means for enabling said control means only during a write sequence, and disabling said control means at all other times during the device operation, to reduce the power consumption of the device attributable to the control means.

9. The improvement of claim 8, in which:

the control means includes means for placing the device in a reduced power mode upon detecting the insufficient power supply level.