Method for preparing semiconductor member

• US 5,374,581 A
• Filed: 09/27/1993
• Issued: 12/20/1994
• Est. Priority Date: 07/31/1991
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Sakaguchi, Kiyofumi, Ichikawa, Takeshi, Yonehara, Takao
• Primary Examiner(s): Breneman, R. Bruce
• Assistant Examiner(s): Paladugu, Ramamohan Rao
• Application Number:
  US08/127,113
• Time in Patent Office: 449 Days
• Field of Search: 437/62, 437/71, 437/86, 437/235, 437/974, 148/DIG. 12, 156/654, 156/657
• US Class Current: 438/459
• CPC Class Codes: H01L 21/0203 Making porous regions on the surface
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 21/76256 using silicon etch back techniques, e.g. BESOI, ELTRAN
• CPC Class Codes: H01L 31/1892 methods involving the use of temporary, removable substrates
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy
• CPC Class Codes: Y10S 148/012 Bonding, e.g. electrostatic for strain gauges

Abstract

A method for preparing a semiconductor member comprising steps of: making a silicon substrate porous; forming a non-porous silicon monocrystalline layer on the porous silicon substrate at a first temperature; bonding a surface of the non-porous silicon monocrystalline layer on to another substrate having an insulating material on the surface thereof; etching the porous silicon by removing the porous silicon of the bonded substrate by chemical etching; and forming a monocrystalline silicon layer on the non-porous silicon monocrystalline layer by epitaxial growth at a second temperature higher than the first temperature.

Claims

1. A method for preparing a semiconductor member, characterized by including the steps of:

making a silicon substrate porous;

forming a non-porous silicon monocrystalline layer on said porous silicon substrate at a first temperature;

bonding a surface of said non-porous silicon monocrystalline layer on to another substrate having an insulating material on the surface thereof;

etching the porous silicon by removing said porous silicon of said bonded substrate by chemical etching; and

forming a monocrystalline silicon layer on said non-porous silicon monocrystalline layer by epitaxial growth at a second temperature higher than said first temperature.

2. The method according to claim 1, wherein said another substrate having an insulating material on the surface thereof is a light transparent glass substrate.

3. The method according to claim 1, wherein said another substrate having an insulating material on the surface thereof is a silicon substrate.

4. The method for preparing a semiconductor member according to claim 1, characterized in that the method of growing epitaxially a monocrystalline silicon layer at said second temperature is a CVD method.

5. The method for preparing a semiconductor member according to claim 1, characterized in that the sum of the thickness of said non-porous silicon monocrystalline layer formed on said porous silicon substrate at said first temperature and the thickness of said monocrystalline silicon layer formed at said second temperature is 100 μ

m or less.

6. The method for preparing a semiconductor member according to claim 1, characterized in that said non-porous silicon monocrystalline layer formed at said first temperature is formed by epitaxial growth.

7. The method for preparing a semiconductor member according to claim 1, characterized in that said non-porous silicon monocrystalline layer formed at said first temperature is formed by a method which is selected from the bias sputtering method, the molecular beam epitaxial method, the plasma CVD method, the photo assisted CVD method, the liquid phase growth method, and the CVD method.

8. The method for preparing a semiconductor member according to claim 1, characterized in that said second temperature is 900°

C. or greater.

9. The method for preparing a semiconductor member according to claim 1, characterized in that said process of making porosity is anodization.

10. The method for preparing a semiconductor member according to claim 7, characterized in that said anodization is conducted in an HF solution.

11. The method for preparing a semiconductor member according to claim 1, characterized in that said etching process is carried out after the portion except for said porous silicon surface is covered with an anti-etching film.