Inrush current limiting circuit

• US 5,374,887 A
• Filed: 11/12/1993
• Issued: 12/20/1994
• Est. Priority Date: 11/12/1993
• Status: Expired due to Term

• Current Assignee: Astec International Limited (Emerson Electric Company)
• Original Assignee: Northern Telecom Limited (Nortel Networks Corporation)
• Inventors: Drobnik, Josef C.
• Primary Examiner(s): Skudy, R.
• Assistant Examiner(s): TSO, EDWARD H
• Application Number:
  US08/150,911
• Time in Patent Office: 403 Days
• Field of Search: 323/299, 323/908, 361/58
• US Class Current: 323/299
• CPC Class Codes: G05F 1/573 with overcurrent detector
• CPC Class Codes: H02H 9/001 limiting speed of change of electric quantities, e.g. soft switching on or off progressive control of electronic switches for eliminating interferences H03K17/16
• CPC Class Codes: Y10S 323/908 Inrush current limiters

Abstract

An inrush current limiting circuit contains an FET as an active component which is controlled by a network of passive components. The network includes a gate control circuit for controlling the operation of the FET and a negative feedback circuit which responds to the load voltage during the transient state. The current limiting circuit is fast acting during momentary power interruptions and has low power losses.

Claims

1. An inrush current limiting circuit for limiting transient inrush current from input terminals to which a DC input power source is to be connected, to load terminals to which a capacitive load is to be connected, comprising:

a pair of connection paths between the input terminals and load terminals;

FET means connected in series with one of the connection paths;

a direct connection in the other of the connection paths;

a gate control circuit for applying a control potential to the gate of the FET means in response to an input voltage at the input terminals; and

a negative feedback circuit connected between one of the load terminals and the gate control circuit for producing a feedback signal in response to a load voltage at the load terminals and feeding back the same to the gate of the FET means to control the conduction of the FET means in response to the load voltage,

in that the negative feedback comprises a diode, resistors and capacitors having a predetermined time constant.

2. The inrush current limiting circuit according to claim 1, wherein the diode is connected between one of the input terminals and the negative feedback circuit.

3. The inrush current limiting circuit according to claim 1, wherein the gate control circuit is connected across the input terminals and comprises a resistor and a capacitor having a predetermined time constant.

4. The inrush current limiting circuit according to claim 3, wherein a zener diode is connected across the FET.