Methods and apparatus for pulse-width modulation that use a counter and a modulus device

• US 5,377,346 A
• Filed: 06/06/1990
• Issued: 12/27/1994
• Est. Priority Date: 06/06/1990
• Status: Expired due to Term

• Current Assignee: NEC Electronics Incorporated (NEC Corporation)
• Original Assignee: NEC Electronics Incorporated (NEC Corporation)
• Inventors: Williams, Stephen R.
• Primary Examiner(s): Bowler, Alyssa H.
• Assistant Examiner(s): GECKIL, MEHMET B
• Application Number:
  US07/534,382
• Time in Patent Office: 1,665 Days
• Field of Search: 395/500, 395/550, 395/800, 331/172, 368/202
• US Class Current: 713/502
• CPC Class Codes: G06F 1/025 for functions having two-valued amplitude, e.g. Walsh functions
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency

Abstract

Methods are provided for generating a square wave of variable duty cycle using a microprocessor and an interval timer. The duty cycle can be changed without changing the period. The duty cycle is changed on a rising or a falling edge of the signal as desired.

Claims

1. A method of generating a square wave signal in a system wherein a timer-out signal is toggled from one of first and second levels to another when a counter of an interval timer counts to a preselected value, comprising the electrical-circuitry-implemented steps of:

generating an interrupt in response to said counter counting to said preselected value;

on each of a plurality of successive interrupts generated by said generating step, performing the steps of;

loading said counter from a modulus register;

determining whether said timer-out signal is of said first level or said second level; and

after loading said counter from said modulus register, loading said modulus register with a next value to be loaded into said counter when said counter counts to said preselected value, wherein the next value is;

a selected first value determining a duration of a first-level portion of said timer-out signal, if said timer-out signal is of said second level; and

a selected second value determining a duration of a second-level portion of said timer-out signal and different from said first value, if said timer-out signal is of said first level; and

during said modulus register loading step, counting by said counter towards said preselected value; and

after the last interrupt of said plurality of interrupts, changing said square wave signal period and duty cycle at a point of time when said timer-out signal toggles from said second level to said first level, said step of changing comprising the steps of;

at the first interrupt after said plurality of said interrupts, loading said modulus register with;

a selected third value if said timer-out signal is of said second level; and

said second value if said timer-out signal is of said first level;

at each interrupt following said first interrupt, loading said modulus register with;

said third value if said timer-out signal is of said second level;

a selected fourth value if said timer-out

signal is of said first level;

wherein

(v1-v2)² +(v3-v4)² is not equal to 0, wherein

v1 is said first value;

v2 is said second value;

v3 is said third value;

v4 is said fourth value;

during said modulus register loading steps, counting by said counter towards said preselected value.

2. A method of generating a first 2-level square wave signal of a predetermined period and a predetermined non-50% duty cycle on an output lead of a circuit, comprising the electrical-circuitry-implemented steps of:

determining a first value and a second value different from said first value from said predetermined period and said duty cycle;

generating an end-count signal when a counter counts to a selected final value;

following said steps of determining and generating,

if a signal on said output lead is of a first level, then changing it to a second level different from said first level; and

if it is of said second level, then changing it to said first level; and

loading a value from a modulus device into said counter;

following the above steps, counting by said counter to said final value;

after said level changing step but before said counter counts to said final value, and while said counter counts to said final value, loading said modulus device with;

said first value if said signal is of said second level; and

said second value if said signal is not of said second level;

determining a third value and a fourth value from a period and a duty cycle of a second square wave signal;

after said step of loading said modulus device, performing a wave changing step of;

repeating said generating step through said counting step;

before said counter counts to sad final value, and while said counter counts to said final value, loading said modulus device with;

said third value if said signal is of said second level; and

said second value if said signal is of said first level; and

if said signal is then of said second level, repeating said wave changing step.

3. A method of generating a first 2-level square wave signal of a predetermined period and a predetermined non-50% duty cycle on an output lead of a circuit, comprising the electrical-circuitry-implemented steps of:

determining a first value and a second value different from said first value from said predetermined period and said duty cycle;

generating an end-count signal when a counter counts to a selected final value;

following said steps of determining and generating,

if a signal on said output lead is of a first level, then changing it to a second level different from said first level; and

if it is of said second level, then changing it to said first level; and

loading a value from a modulus device into said counter;

following the above steps, counting by said counter to said final value;

after said level changing step duty before said counter counts to said final value, and while said counter counts to said final value, loading said modulus device with;

said first value if said signal is of said second level; and

said second value if said signal is not of said second level;

wherein;

said counter is register TM0 of a chip of NEC V25/35 family;

said modulus device is register MD0 of said chip;

said output lead is pin TOUT of said chip;

said end-count signal is an interrupt signal of said chip; and

said steps of loading said modulus device are performed by an interrupt service routine processing said interrupt signals.

4. A device for generating a first 2-level square wave signal of a predetermined period and a predetermined non-50% duty cycle, comprising:

an output lead on which said signal is generated;

a counter;

a modulus device;

means for determining a first value and a second value different from said first value from said period and said duty cycle;

means for generating an end-count signal when said counter counts to a selected final value;

means responsive to said generating means, for changing a signal on said output lead to a second level if said signal is of a first level, and to said first level if said signal is of said second level;

means responsive to said generating means, for loading a value from said modulus device into said counter;

means responsive to said changing means and said loading means, for counting by said counter to said final value; and

means responsive to said changing means and said loading means, for loading said modulus device, before said counter counts to said final value and while said counter counts towards said final value, with;

said first value if said signal is of said second level; and

said second value if said signal is of said first level;

wherein;

said counter is register TM0 of a chip of NEC V25/35 family;

said modulus device is register MD0 of said chip;

said output lead is pin TOUT of said chip;

said end-count signal is an interrupt signal of said chip;

said modulus device loading means is an interrupt service routine processing said interrupts.