Bootstrap circuit for driving a power MOS transistor

• US 5,381,044 A
• Filed: 07/22/1992
• Issued: 01/10/1995
• Est. Priority Date: 07/24/1991
• Status: Expired due to Term

• Current Assignee: Consorzio Per Il Sistema Informativo Csi Piemonte, SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Original Assignee: Consorzio Per Il Sistema Informativo Csi Piemonte, SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Inventors: Zisa, Michele, Belluso, Massimiliano, Paparo, Mario
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): Lam, T. T.
• Application Number:
  US07/918,440
• Time in Patent Office: 902 Days
• Field of Search: 307/270, 307/264, 307/578, 307/296.1, 307/296.2
• US Class Current: 327/109
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/6877 the control circuit comprising active elements different from those used in the output circuit
• CPC Class Codes: H03K 19/01714 by bootstrapping, i.e. by positive feed-back

Abstract

In accordance with the present invention, the above and other objects and advantages are obtained with a bootstrap circuit for a power MOS transistor in a high side configuration. Such circuit includes a first capacitor chargeable to a first voltage which is a function of the supply voltage of the power transistor. It further includes a second capacitor combined with the first capacitor so as to provide a second voltage which is higher than the first voltage and the threshold voltage of the power transistor.

Claims

1. Bootstrap circuit for a power MOS transistor having a drain connected to a power supply terminal and a source connected to a load, comprising a first capacitor chargeable to a first voltage which is a function of the supply voltage of the power transistor, wherein said first capacitor has a first terminal connected to the load and a second terminal connected to said power supply through a first diode and to the gate of the power MOS transistor through first switching means controlled by an activating signal, and including a second capacitor having a first terminal connected to the second terminal of the first capacitor through a second diode and a second terminal connected to ground through second switching means, and further including means, connected to said second terminal of said second capacitor and said second switching means for generating a second voltage on said second capacitor which is higher than said first voltage by an amount at least as great as a threshold voltage of the power MOS transistor.

2. Bootstrap circuit for a power MOS transistor having a drain connected to a power supply terminal and a source connected to a load, comprising a first capacitor chargeable to a first voltage which is a function of the power supply voltage of the power transistor, wherein said first capacitor has a first terminal connected to the load and a second terminal connected to said power supply through a diode, and including a second capacitor having a first terminal connected to the second terminal of said first capacitor through a transistor and a second terminal connected to a gate of said power MOS transistor through a switching means controlled by an activating signal, and further including means coupled to said transistor for generating a second voltage, taken across said capacitors and equal to the sum of the voltages across said first and second capacitors, which is higher than said first voltage plus a threshold voltage of the power MOS transistor.

3. A driver circuit for a MOS power transistor having a drain connected to a power supply terminal, comprising:

control means connected to a gate of the power transistor for switching the power transistor on and off in response to a control signal;

a first capacitor having a first end connected to a source of the power transistor and to a load, and having a second end connected to coupled to said power supply through a first diode and to the gate of the power MOS transistor through said control means, said control means for supplying charge to the power transistor gate;

a second capacitor having a first end connected to the second end of said first capacitor; and

charging means connected to a second end of said second capacitor for charging said second capacitor when the power transistor is on, and for boosting a voltage on the first end thereof above a supply voltage when the power transistor is off so as to also boost the voltage across said first capacitor, wherein such boosted voltage is applied to the power transistor gate through said control means to turn the power transistor on.

4. The driver circuit of claim 3, further comprising a second diode between the first capacitor second end and the second capacitor first end to prevent current flow from said first capacitor to said second capacitor.

5. The driver circuit of claim 3, wherein said charging means comprises:

a first switch responsive to the control signal for connecting the second capacitor second end to a ground when the power transistor is on; and

a second switch responsive to the control signal for connecting the second capacitor second end to said power supply voltage when the power transistor is off.

6. A driver circuit for a MOS power transistor having a source terminal connected to a load and a drain terminal connected to a power supply to a load, comprising:

control means connected to a gate of the power transistor for switching the power transistor on and off in response to a control signal;

a first capacitor having a first end connected to a source of the power transistor and to a load;

a second capacitor having a first end connected to said control means for supplying charge to a gate of the power transistor;

charging means connected to said power supply and a second end of said first capacitor and to a second end of said second capacitor for charging said second capacitor when the power transistor is off, and for connecting both capacitors in series when the power transistor is on so as to apply a boosted voltage to the power transistor gate through said control means.

7. The driver circuit of claim 6, wherein said charging means comprises:

first switch means responsive to the control signal for connecting the second capacitor second end to ground when the power transistor is off, wherein said power supply voltage charges said second capacitor; and

second switch means responsive to the control signal for connecting both second capacitor ends together when the power transistor is on, wherein a boosted voltage is provided to the power transistor gate through said control means.