Semiconductor device with low thermally generated leakage current
First Claim
1. A semiconductor device having first, second and third semiconducting region connected in series for current input, current control and current output respectively and each arranged to be biased by a respective biasing means, wherein the device includes an extracting contact comprising a means for extracting minority carriers from the second region and the second region is of low doping and has a common interface with a fourth semiconducting region, said fourth semiconducting region having a common interface with a fifth semiconducting region, and wherein the fourth region:
- (a) has like majority carrier type to that of the fifth region,(b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the second region adjacent the third region and thereby to reduce the intrinsic contribution to current reaching the third region,(c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the second region,(d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the second region to the fifth region, and(e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the second region.
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Abstract
A semiconductor device in the form of a metal insulator field effect transistor (MISFET) (200) is constructed as a heterostructure of narrow bandgap In1-x Alx Sb semiconductor materials. The MISFET (200) is formed from four semiconducting layers (112 to 118) arranged in series as follows: a heavily doped p-type first layer (112), a heavily doped relatively wider bandgap p-type second layer (114), a lightly doped p-type third layer (116) and a heavily doped n-type fourth layer (118). A source (202) and a drain (204) are formed in the fourth layer (118) and a gate (116/205) in the third layer. An n+ p- junction (124) is formed between the third and fourth layers and a p+ p- junction (122) between the second and third layers. The second layer (114) provides a conduction band potential energy barrier to minority carrier (electron) flow to the gate (116/205), and is sufficiently wide to prevent tunnelling of minority carriers therebetween. The first and second layers (112, 114) in combination provide a p+ p+ excluding contact to the third layer (116). The n+ p- junction (124) between the third and fourth layers (116, 118) is an extracting contact; when reverse biased in operation, this junction (124) extracts minority carriers from the region of the third layer (116) adjacent the collector (118/204). In operation, the third layer (116) incorporating the gate (205) becomes depleted of charge carriers and therefore exhibits greatly reduced leakage current. In consequence, the MISFET (200) has good dynamic range in terms of controllable drain current. The invention also provides bipolar transistors (300, 400 ) and related devices.
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Citations
19 Claims
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1. A semiconductor device having first, second and third semiconducting region connected in series for current input, current control and current output respectively and each arranged to be biased by a respective biasing means, wherein the device includes an extracting contact comprising a means for extracting minority carriers from the second region and the second region is of low doping and has a common interface with a fourth semiconducting region, said fourth semiconducting region having a common interface with a fifth semiconducting region, and wherein the fourth region:
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(a) has like majority carrier type to that of the fifth region, (b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the second region adjacent the third region and thereby to reduce the intrinsic contribution to current reaching the third region, (c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the second region, (d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the second region to the fifth region, and (e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the second region. - View Dependent Claims (2, 3, 4, 5, 9, 10, 14, 15, 16)
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6. A semiconductor device having first, second and third semiconducting regions connected in series for current input, current control and current output respectively and each arranged to be biased by a respective biasing means, wherein the device includes an extracting contact comprising a means for extracting minority carriers from the second region, and the second region is of low doping and has a common interface with a fourth semiconducting region, said fourth semiconducting region having a common interface with a fifth semiconducting region, and wherein the fourth region:
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(a) has like majority carrier type to that of the fifth region, (b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the second region adjacent the third region and thereby to reduce the intrinsic contribution to current reaching the third region, (c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the second region, (d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the second region to the fifth region, and (e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the second region wherein the fourth region bandgap is at least 3 kT/q Volts wider than at least one of said second region and said fifth region, where q is the electronic charge, k is Boltzmann'"'"'s constant and T is the device operating temperature.
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7. A semiconductor device having first, second and third semiconducting regions connected in series for current input, current control and current output respectively and each arranged to be biased by a respective biasing means, wherein the device includes an extracting contact comprising a means for extracting minority carriers from the second region, and the second region is of low doping and has a common interface with a fourth semiconducting region, said fourth semiconducting region having a common interface with a fifth semiconducting region, and wherein the fourth region:
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(a) has like majority carrier type to that of the fifth region, (b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the second region adjacent the third region and thereby to reduce the intrinsic contribution to current reaching the third region, (c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the second region, (d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the second region to the fifth region, and (e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the second region wherein; (a) the first and third regions are of InSb having an n-type dopant concentration of at least 2×
1017 atoms/cm3,(b) the second region is of InSb having a p-type dopant concentration of less than 1×
1017 atoms/cm3,(c) the fourth region is of In1-x Alx Sb having a p-type dopant concentration of at least 5×
1017 atoms/cm3, where x is a compositional parameter in the range 0.01 to 0.7, and(d) the fifth region is of InSb with a p-type dopant concentration of at least 5×
1017 atoms/cm3. - View Dependent Claims (8)
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11. A semiconductor device having first, second and third semiconducting regions connected in series for current input, current control and current output respectively and each arranged to be biased by a respective biasing means, wherein the device includes an extracting contact comprising a means for extracting minority carriers from the second region, and the second region is of low doping and has a common interface with a fourth semiconducting region, said fourth semiconducting region having a common interface with a fifth semiconducting region, and wherein the fourth region:
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(a) has like majority carrier type to that of the fifth region, (b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the second region adjacent the third region and thereby to reduce the intrinsic contribution to current reaching the third region, (c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the second region, (d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the second region to the fifth region, and (e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the second region; wherein said device is a bipolar transistor in which the first, second and third regions are emitter, base and collector regions respectively, the first and third regions are of like majority carrier type opposite to that of the second, fourth and fifth regions, and the fourth region is arranged to provide minority carrier exclusion effects over substantially all of the second region wherein the second region is a layer having first and second sides separated by its layer thickness, the first and third regions are connected respectively to the first and second sides of the second region, and the fourth region is connected on one side to the first side of the second region and on the other side to the fifth region. - View Dependent Claims (12, 13)
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17. A semiconductor device comprising a field effect transistor having semiconducting source, gate and drain regions, and wherein the device includes an extracting contact comprising a means for extracting minority carriers from the gate region, the gate region is of low doping and has a common interface with a fourth semiconducting region, said fourth semiconducting region having a common interface with a fifth semiconducting region, the source and drain regions have like majority carrier type opposite to that of the gate region and the fourth and fifth regions, the source, gate and drain regions and the fourth and fifth regions each being of semiconductor bandgap less than 0.7 eV, and the fourth region:
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(a) has like majority carrier type to that of the fifth region, (b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the gate region adjacent the drain region and thereby to reduce the intrinsic contribution to current reaching the drain region, (c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the gate region, (d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the gate region to the fifth region, and (e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the gate region.
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18. A semiconductor device comprising a field effect transistor having source, gate and drain regions and incorporating an extracting contact comprising a means for extracting minority carriers from the gate region, and wherein the gate region is a layer of low doping interfaced on one side with the source and drain regions and on another side with a fourth semiconducting region, said fourth semiconducting region interfaced with a fifth semiconducting region separated from the gate region by the fourth region thickness, the source and drain regions are of like majority carrier type, and the fourth region:
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(a) has like majority carrier type to that of the fifth region and opposite to that of the source and drain regions, (b) is biasable through the fifth region and comprises an excluding contact means for excluding minority carriers from at least parts of the gate region adjacent the drain region and thereby to reduce the intrinsic contribution to current reaching the drain region, (c) has a bandgap sufficiently large to provide a potential energy barrier to minority carrier flow from the fifth region to the gate region, (d) has sufficiently high doping to counteract potential barrier impediment to majority carrier flow from the gate region to the fifth region, and (e) is less wide than a critical thickness associated with dislocation formation but sufficiently wide to inhibit tunnelling of minority carriers from the fifth region to the gate region. - View Dependent Claims (19)
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Specification