Low power optoelectronic device and method
First Claim
1. In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off, a method of selectively varying load comprising the steps ofapplying an active component in parallel with the load, the active component being switchable between low impedance and high impedance states,switching the active component to a low impedance state when the photosource is off, andswitching the active component to a high impedance state when the photosource is on.
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Abstract
Methods and devices are disclosed for selectively varying the load to a photodetector such as a phototransistor which forms part of a photosource/photodetector pair and for selectively using to advantage or compensating for the parasitic capacitance of the photodetector to permit reductions in power, conversion of fixed signal thresholds to software controlled digital hysteresis, automatic adjustment and compensation for unmatched photosources and associated photodetectors, and adjustment of fixed voltage thresholds.
41 Citations
11 Claims
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1. In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off, a method of selectively varying load comprising the steps of
applying an active component in parallel with the load, the active component being switchable between low impedance and high impedance states, switching the active component to a low impedance state when the photosource is off, and switching the active component to a high impedance state when the photosource is on.
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3. In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of minimizing power consuption comprising the steps of
energizing the photosource for a preselected period such that light from the photosource impinges on the photodetector and charges the inherent parasitic capacitance of the photodetector, turning off the photosource, and after the photosource is turned off and before the inherent parasitic capacitance is discharged, reading the value of the output of the photodetector.
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5. In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of creating digital hysteresis comprising the steps of
setting a current sample value of the photodetector output, turning the photosource on so that light therefrom impinges on the photodetector and charges up the inherent parasitic capacitance, reading a first sample value of the photodetector output, waiting a preselected period of time representative of the difference between preselected first and second thresholds of a hysteresis loop, reading a second sample value of the photodetector output, testing the current sample value for a logical one, replacing the current sample value with the first sample value if the current sample is not a logical one, replacing the current sample value with the second sample value if the current sample is a logical one, repeating the foregoing steps.
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6. In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of selectively adjusting the output of the photodetector comprising the steps of
setting a minimum time value equal to a predetermined worst case value, turning the photosource on for a period of time so that light therefrom impinges on the photodetector, initializing a timer, incrementing the timer, sampling the phototransistor output, testing the phototransistor output for a logical one, setting the minimum time value to the value of the timer if the phototransistor output is a logical one, incrementing the timer if the phototransistor output is not a logical one and the timer value is less than the minimum time value.
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8. In a photosource/photodetector circuit having a photosource, a photodetector and a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitance, the method of selecting an apparent input threshold comprising the steps of
connecting a voltage controlled avalanching device in series with the photodetector, connecting an active component switchable between low and high impedance states in parallel with the voltage controlled avalanching device, switching the active component to a low impedance state when the photosource is on, and to a high impedance state when the photosource is off.
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11. In an electronic mouse having a plurality of LED/phototransistor pairs, each pair having a shutter therebetween and the phototransistor having an output and inherent parasitic capacitance and a load connected between the output and a reference, the method comprising the steps of
selectively turning the LEDs on and off connecting the outputs each to a respective switchable input/output port of a microprocessor, selecting the respective input/output ports to be an input at least during the substantial majority of the time when the associated LED is on, selecting the respective input/output ports to be an output and causing the output pin of the I/O port to be a low impedance at least during the substantial majority of the time when the associated LED is off, causing the parasitic capacitance of each phototransistor to charge during the time the associated LED is on, turning the associated LED off, sampling the value of the respective outputs after the associated LED is turned off and before the inherent parasitic capacitance is discharged.
Specification