Integrated circuit device having signal wiring structure of ultrahigh-speed performance

• US 5,384,486 A
• Filed: 02/26/1993
• Issued: 01/24/1995
• Est. Priority Date: 07/02/1990
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Konno, Mitsuo
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): MEIER, STEPHEN D
• Application Number:
  US08/026,195
• Time in Patent Office: 697 Days
• Field of Search: 357/45, 357/71, 257/752, 257/296, 257/275, 257/276, 257/753
• US Class Current: 257/752
• CPC Class Codes: H01L 23/5221 Crossover interconnections
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 23/538 the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates H05K takes precedence; manufacture or treatment H01L21/4846 ; mountings per se H01L23/12; materials H01L23/49866
• CPC Class Codes: H01L 23/5381 Crossover interconnections, e.g. bridge stepovers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

An integrated circuit device has a substrate, a plurality of circuit elements or units arranged on the substrate and having terminals, a plurality of signal lines connected between the terminals of the circuit elements or units, or between the terminals and external connection terminals, and an alternating current ground line provided close to the signal lines to determine a transmission characteristic of the signal lines, the alternating current ground line including a high-potential direct current power source line and a low-potential direct current power source line, the high-potential direct current power source line and the low-potential direct current power source line being vertically separated by a dielectric layer.

Claims

1. An integrated circuit device, comprising:

a substrate;

a plurality of circuit elements arranged on said substrate and having terminals;

a plurality of signal lines connected between said terminals of said circuit elements; and

a ground line provided close to said signal lines for controlling transmission characteristics of said signal lines, said ground line including a high-potential direct current power source line and a low-potential direct current power source line, said high-potential direct current power source line and said low-potential direct current power source line being vertically stacked and separated by a dielectric layer therebetween, said high-potential and low potential direct current power source lines and at least one of said signal lines extending in a parallel direction with each other, wherein the thickness of the dielectric layer is sufficiently thin compared with a width of said high-potential and low-potential direct current power source lines so that the impedance of said high-potential and low potential direct current power source lines is sufficiently less than the impedance between the signal lines so that said high-potential and low-potential direct current power source lines have substantially the same potential in terms of a high frequency and thereby function as a single ground line for the signal line.

2. A device according to claim 1, wherein

said signal lines are stacked over said ground line to have an air bridge structure,

said signal lines have bridge piers to support said signal lines, and

said bridge piers are formed over a portion of said substrate from which said ground line is removed.

3. A device according to claim 1, wherein

said plurality of signal lines have first and second line members extending parallel to each other being at least partially adjacent to each other, and

said first and second signal line members are formed over said ground line to have an air bridge structure, said ground line being common to both said first and second signal line members.

4. A device according to claim 3, wherein

said first and second signal line members have bridge piers for supporting said first and second signal line members, and

said bridge piers are arranged so as to prevent overlapping with each other in the parallel extending direction.

5. A device according to claim 1, wherein said signal lines are arranged on said substrate through an insulating film close to a side of said ground line.

6. A device according to claim 1, wherein

said plurality of signal lines have first and second signal line members extending at least partially parallel to each other, and

said first and second signal line members are arranged on said substrate through an insulating film while sandwiching said ground line therebetween, said ground line being common to both of said first and second signal line members.

7. An integrated circuit device, comprising:

a substrate;

a plurality of circuit elements arranged on said substrate and having terminals;

a plurality of signal lines connected between said terminals and external connection terminals; and

a ground line provided close to said signal lines for controlling transmission characteristics of said signal lines, said ground line including a high-potential direct current power source line and a low-potential direct current power source line, said high-potential direct current power source line and said low-potential direct current power source line being vertically stacked and separated by a dielectric layer therebetween, said high-potential and low potential direct current power source lines and at least one of said signal lines extending in a parallel direction with each other, wherein the thickness of the dielectric layer is sufficiently thin compared with a width of said high-potential and low-potential direct current power source lines so that the impedance of said high-potential and low potential direct current power source lines is sufficiently less than the impedance between the signal lines so that said high-potential and low-potential direct current power source lines have substantially the same potential in terms of a high frequency and thereby function as a single ground line for the signal line.