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Information processing device capable of optically writing synapse strength matrix

  • US 5,388,187 A
  • Filed: 07/10/1991
  • Issued: 02/07/1995
  • Est. Priority Date: 07/10/1990
  • Status: Expired due to Fees
First Claim
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1. An information processing device comprising:

  • a semiconductor integrated circuit section including N×

    M neuronic circuit regions arranged in a matrix, said neuronic circuit regions each having an input electrode and an output electrode;

    a first heterogeneous molecular film provided on said semiconductor integrated circuit section and having a photoelectric function;

    2N first transparent wiring lines arranged to extend in a first direction on said first heterogeneous molecular film such as to extend above the output electrodes and the input electrodes of M neuronic circuit regions;

    a second heterogeneous molecular film provided on said first heterogeneous molecular film and having a photoelectric function;

    2M second transparent wiring lines arranged to extend in a second direction on said second heterogeneous molecular film such that adjacent two of them extend above N neuronic circuit regions without extending above the output and input electrodes of these neuronic circuit regions;

    a transparent insulating layer provided on said second heterogeneous molecular film and said second transparent wiring lines;

    a transparent electrode provided on said transparent insulating layer;

    a third heterogeneous molecular film provided on said transparent electrode and having a light-emitting function;





    M electrodes provided on said third heterogeneous molecular film and at intersections of the output and input electrodes of said neuronic circuit regions and said first transparent wiring lines and at intersections of said first transparent wiring lines and said second transparent wiring lines; and

    lead wires connected to said 6×



    M electrodes;

    wherein light from said third heterogeneous molecular film irradiates the intersections of said output or said input electrodes of said neuronic circuit regions and said first transparent wiring lines and the intersections of said first transparent wiring lines and said second transparent wiring lines, whereby a coupling strength between said N×

    M neuronic circuit regions is controlled.

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