Tamperproof arrangement for an integrated circuit device
First Claim
1. A tamperproof arrangement for an integrated circuit device comprising:
- an integrated circuit package including a lid for sealing said integrated circuit package;
an integrated circuit die including an integrated circuit for providing electronic circuitry;
die attach material for bonding said integrated circuit die to said integrated circuit package;
means for detecting a physical attack of said integrated circuit;
means responsive to said means for detecting for clearing critical information from said integrated circuit;
said means for detecting including;
at least two metal conductor grids located only underneath said integrated circuit, said conductor grids for detecting damage to said integrated circuit and providing an indication to said means responsive for clearing said critical information; and
a dielectric layer interposed between electrode fingers of said two metal conductor grids, in response to damage of said dielectric layer, said dielectric layer indicating a change in capacitance, said means responsive operating to clear said critical information in response to said change in capacitance.
3 Assignments
0 Petitions
Accused Products
Abstract
A tamperproof arrangement for an integrated circuit device. The arrangement includes a package and lid fabricated of heavy metals to prevent X-radiation or infrared detection of circuit operation. Sensors and control circuitry are located on the integrated circuit die itself which detect increased temperature and radiation and clear or zeroize any sensitive information included within the integrated circuit device. Electrode finger grids above and below the integrated circuit die detect physical attempts to penetrate the integrated circuit die. Critical circuit functions are segregated from non-critical functions. Power applied to the integrated circuit device is monitored and separated for critical and non-critical circuit functions.
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Citations
16 Claims
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1. A tamperproof arrangement for an integrated circuit device comprising:
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an integrated circuit package including a lid for sealing said integrated circuit package; an integrated circuit die including an integrated circuit for providing electronic circuitry; die attach material for bonding said integrated circuit die to said integrated circuit package; means for detecting a physical attack of said integrated circuit; means responsive to said means for detecting for clearing critical information from said integrated circuit; said means for detecting including; at least two metal conductor grids located only underneath said integrated circuit, said conductor grids for detecting damage to said integrated circuit and providing an indication to said means responsive for clearing said critical information; and a dielectric layer interposed between electrode fingers of said two metal conductor grids, in response to damage of said dielectric layer, said dielectric layer indicating a change in capacitance, said means responsive operating to clear said critical information in response to said change in capacitance. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification