Multi-processor demodulator for digital cellular base station employing partitioned demodulation procedure with pipelined execution

• US 5,390,215 A
• Filed: 10/13/1992
• Issued: 02/14/1995
• Est. Priority Date: 10/13/1992
• Status: Expired due to Term

• Current Assignee: Hughes Electronics Corporation (AT&T, Inc.)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Pham, Hiep, Kim, Youngky, Antia, Yezdi
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): TSE, YOUNG TOI
• Application Number:
  US07/960,343
• Time in Patent Office: 854 Days
• Field of Search: 375/39-40, 375/42, 375/80, 375/83, 375/94, 375/96, 375/100, 371/43, 379/58-60, 329/304, 455/133, 455/335, 455/337, 455/344-345
• US Class Current: 375/341
• CPC Class Codes: H03M 13/41 using the Viterbi algorithm or Viterbi processors
• CPC Class Codes: H03M 13/4169 using traceback H03M13/4192 takes precedence
• CPC Class Codes: H03M 13/6325 Error control coding in combination with demodulation
• CPC Class Codes: H03M 13/6502 Reduction of hardware complexity or efficient processing
• CPC Class Codes: H03M 13/6569 Implementation on processors, e.g. DSPs, or software implementations
• CPC Class Codes: H04L 1/0052 Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 25/03197 methods of calculation involving metrics

Abstract

Demodulation is provided for a base station receiver in a cellular communication system by a demodulator having four data linked digital signal processors. An MLSE equalizer and maximal ratio combiner for diversity paths includes multiple components that are partitioned among the processors for pipelined execution with predetermined time ordering.

Claims

1. A demodulator for a base station receiver in a cellular communication system, said demodulator comprising:

means for receiving and filtering transmitted diversity signals;

a plurality of digital signal processors for executing in real time a demodulating procedure employing a multi-state maximum likelihood sequence estimator (MLSE) Process and being executable repeatedly to demodulate successive data groups in each of successive slots in a data frame;

said MLSE Process having multiple calculation components including branch metric, path metric, traceback and channel estimate components that are executed in a predetermined order in each symbol to demodulate data in each data group and that are partitioned among said processors in a predetermined manner;

means for data linking said processors to enable output data from predetermined components to be applied as input data to other predetermined components for time ordered calculations in accordance with the demodulation procedure;

at least a first of said processors having at least one of the filtered diversity signals applied as an input thereto and having means for executing a branch metric component to make branch metric calculations therefor; and

at least an output one of said processors generating a demodulated output for subsequent decoding.

3. The demodulator of claim 1 wherein the MLSE Process is a multi-state Viterbi trellis algorithm.

4. The demodulator of claim 3 wherein:

a total of four processors are provided including said first and said output processors;

a third of said four processors has the other filtered diversity signal applied thereto as an input and has means for executing a branch metric component to make branch metric calculations therefor, the branch metric calculations for said diversity signals being performed by said first and third processors substantially simultaneously during each of successive symbols in each data group execution of the demodulation procedure.

5. The demodulator of claim 4 wherein a second of said four processors has means for executing a path metric component to make path metric calculations on branch metric outputs from said first and third processors.

6. The demodulator of claim 5 wherein the branch metric calculations generated in each symbol are pipelined from said first and second processors to said third processor for a path metric calculation for that symbol during the next symbol.

7. The demodulator of claim 5 wherein:

said first and third processors each has means for executing a channel estimate component in each symbol after execution of the associated branch metric component;

said second processor further has means for executing a traceback component to make traceback calculations on output values from said path metric component; and

a fourth of said processors is said output processor and has means for executing a soft decision component to make soft decision calculations and generates said demodulated output from hard decision bits generated by said traceback component in said second processor.

8. The demodulator of claim 6 wherein the traceback hard decision bits and the path metric calculated in said second processor in each symbol are pipelined to said fourth processor as inputs to said soft decision component for soft decision calculations in the third subsequent symbol.

9. The demodulator of claim 4 wherein said data linking means directly links each of said processors to each other processor.

10. The demodulator of claim 1 wherein all of said components are executed in each symbol with the outputs from one or more predetermined components in each symbol in at least one of said processors being pipelined for input to at least one other predetermined component in a subsequent symbol in another of said processors.

2. The demodulator of claim I wherein said data linking means directly links each of said processors to each other processor.

11. A demodulating method for a base station receiver in a cellular communication system, the steps of said method comprising:

receiving and filtering transmitted diversity signals;

using a plurality of digital signal processors to execute in real time a demodulating procedure employing a multi-state maximum likelihood sequence estimator (MLSE) Process and being executable repeatedly to demodulate successive data groups in each of successive slots in a data frame;

executing multiple calculation components in the MLSE Process including branch metric, path metric, traceback and channel estimate components in a predetermined order in each symbol to demodulate data in each data group and with predetermined partitioning among the processors;

linking the processors to enable output data from predetermined components to be applied as input data to other predetermined components for time ordered calculations in accordance with the demodulation procedure;

applying at least one of the filtered diversity signals as an input to at least a first of the processors and executing a branch metric component in the first processor to make branch metric calculations for the one signal; and

operating at least an output one of said processors to generate a demodulated output for subsequent decoding.

12. The method of claim 11 wherein the MLSE Process is a multi-state Viterbi trellis algorithm.

13. The method of claim 11 wherein the MLSE Process is a multi-state Viterbi trellis algorithm and a total of four processors are provided including the first and output processors, and wherein the steps further comprise:

applying the other filtered diversity signal to a third of said four processors as an input and operating the third processor to execute a branch metric component to make branch metric calculations for the other signal, the branch metric calculation steps for the diversity signals being performed by the first and third processors substantially simultaneously during each of successive symbols in each data group execution of the demodulation procedure;

operating a second of the four processors to execute a path metric component to make path metric calculations on branch metric outputs from the first and third processors;

operating the first and third processors to execute a channel estimate component in each symbol after execution of the associated branch metric component;

operating the second processor to execute a traceback component to make traceback calculations on output values from the path metric component; and

operating a fourth of the processors as the output processor to execute a soft decision component to make soft decision calculations and generate the demodulated output from hard bits generated by the traceback component in the second processor.

14. A base station receiver for a cellular communication system comprising:

respective antenna means for receiving diversity signals from mobile transmitters;

means for downconverting the diversity signals;

means for demodulating the downconverted signals; and

said demodulation means having;

means for receiving and filtering transmitted diversity signals;

a plurality of digital signal processors for executing in real time a demodulating procedure employing a multi-state maximum likelihood sequence estimator (MLSE) Process and being executable repeatedly to demodulate successive data groups in each of successive slots in a data frame;

said MLSE Process having multiple calculation components including branch metric, path metric, traceback and channel estimate components that are executed in a predetermined order in each symbol to demodulate data in each data group and that are partitioned among said processors in a predetermined manner;

means for data linking said processors to enable output data from predetermined components to be applied as input data to other predetermined components for time ordered calculations in accordance with the demodulation procedure;

at least a first of said processors having at least one of the filtered diversity signals applied as an input thereto and having means for executing a branch metric component to make branch metric calculations therefor;

at least an output one of said processors generating a demodulated output for subsequent decoding;

means for decoding the output signals from said demodulating means; and

means for voice processing the decoded signals for coupling to a public telephone network.

15. The base station receiver of claim 14 wherein the MLSE Process is a multi-state Viterbi trellis algorithm.

16. The base station receiver of claim 14 wherein:

a total of four processors are provided including said first and said output processors;

a third of said four processors has the other filtered diversity signal applied thereto as an input and has means for executing a branch metric component to make branch metric calculations therefor, the branch metric calculations for said diversity signals being performed by said first and third processors substantially simultaneously during each of successive symbol in each data group execution of the demodulation procedure;

a second of said four processors has means for executing a path metric component to make path metric calculations on branch metric outputs from said first and third processors;

said first and third processors each have means for executing a channel estimate component in each symbol after execution of the associated branch metric component;

said second processor further has means for executing a traceback component to make traceback calculations on output values from said path metric component; and

a fourth of said processors is said output processor and has means for executing a soft decision component to make soft decision calculations and generate said demodulated output from hard bits generated by said traceback component in said second processor.