Hardware implemental field oriented bit stream formatter for generating user programmed data formats
First Claim
1. A programmable formatter for formatting digital bit stream information from a cooperating microcomputer digital source, said formatter comprising:
- an addressable memory having an address port and a data port for storing program instructions which define a data format,a next state logic circuit for requesting a next program instruction from said addressable memory upon completion of execution of a current program instruction,an instruction register for receiving and holding said current program instruction read out of said data port of said memory from a given address provided by said next state logic circuit;
a field state machine, coupled to said memory to receive instruction length information from said next state logic circuit, for indicating when said current program instruction has been completed and for requesting said next program instruction from said addressable memory be transferred to said instruction register;
instruction decoder, coupled to said instruction register to receive said current program instruction read out from said data port, for decoding said current program instruction;
a repetition counter, coupled to said instruction decoder, for counting a number of iterations of portions of said digital information as specified by said current program instruction;
a data register, coupled to said instruction decoder, for storing and outputting programmed data packets of said digital information as specified by said current program instruction;
said formatter further wherein each program instruction defines at least one of a field and field set of the data format, wherein a field set is a collection of fields of said digital information occurring in a specified order;
said formatter further wherein each program instruction includes a length portion for setting a length of each field, a content portion for indicating the content of each field, and a control portion for specifying a control for each program instruction; and
wherein the content portion of each program instruction specifies one of a defined internal pattern and a variable external pattern.
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Accused Products
Abstract
A programmable formatter for providing a data format in response to programmable commands comprises a memory for storing at least program instructions which define the data format; an instruction register for receiving and holding a current program instruction read out of the memory from a given address; a field state machine for indicating when the current program instruction has been completed; an instruction decoder for decoding the program instruction and for specifying information required by a decoded instruction; a repetition counter for counting a number of iterations specified by the current instruction; a data register for storing and outputting fixed patterns specified by the current program instruction; and a next state logic circuit for requesting a next program instruction from the memory when the current program instruction has been completed.
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Citations
8 Claims
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1. A programmable formatter for formatting digital bit stream information from a cooperating microcomputer digital source, said formatter comprising:
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an addressable memory having an address port and a data port for storing program instructions which define a data format, a next state logic circuit for requesting a next program instruction from said addressable memory upon completion of execution of a current program instruction, an instruction register for receiving and holding said current program instruction read out of said data port of said memory from a given address provided by said next state logic circuit; a field state machine, coupled to said memory to receive instruction length information from said next state logic circuit, for indicating when said current program instruction has been completed and for requesting said next program instruction from said addressable memory be transferred to said instruction register; instruction decoder, coupled to said instruction register to receive said current program instruction read out from said data port, for decoding said current program instruction; a repetition counter, coupled to said instruction decoder, for counting a number of iterations of portions of said digital information as specified by said current program instruction; a data register, coupled to said instruction decoder, for storing and outputting programmed data packets of said digital information as specified by said current program instruction; said formatter further wherein each program instruction defines at least one of a field and field set of the data format, wherein a field set is a collection of fields of said digital information occurring in a specified order; said formatter further wherein each program instruction includes a length portion for setting a length of each field, a content portion for indicating the content of each field, and a control portion for specifying a control for each program instruction; and wherein the content portion of each program instruction specifies one of a defined internal pattern and a variable external pattern. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification