Noise reduction apparatus for video image

• US 5,404,179 A
• Filed: 09/11/1992
• Issued: 04/04/1995
• Est. Priority Date: 09/13/1991
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Hamasaki, Takeshi
• Primary Examiner(s): Kostak, Victor R.
• Assistant Examiner(s): Flynn, Nathan J.
• Application Number:
  US07/943,308
• Time in Patent Office: 935 Days
• Field of Search: 358/167, 358/166, 358/36, 358/37, 358/105
• US Class Current: 348/620
• CPC Class Codes: H04N 5/21 Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
• CPC Class Codes: H04N 9/646 for image enhancement, e.g. vertical detail restoration, cross-colour elimination, contour correction, chrominance trapping filters

Abstract

A field difference signal of a luminance signal is transformed to a plurality of frequency components by the Hadamard transformation, subsequently, nonlinear operation and inverse-transformation are applied to the frequency components and the inverse-transformed field difference signal is subtracted from the luminance signal, and thereby noise in the luminance signal is reduced, on the other hand in respect to a color difference signal, motion of a video image is detected on the basis of the level of at least one of the frequency components; and when the motion of the video image is large and the level of the frequency component is larger than a predetermined value, the level of the field difference signal to be subtracted from the color difference signal is decreased; on the contrary, when the level of the frequency component is the predetermined value and below, the level of the field difference signal to be subtracted from the color difference signal is increased.

Claims

1. A noise reduction apparatus comprising:

first delay means for delaying a first video input signal by a predetermined time length,

first calculation means for outputting a finite difference signal between said first video input signal and the first video input signal delayed by said first delay means,

transformation means comprising;

a transformation circuit for applying nonlinear operation to said transformation components, and

an inverse-transformation circuit for inverse-transforming said transformation components output from said nonlinear operation circuit,

second calculation means for outputting another finite difference signal between said first video input signal and an output of the inverse-transformation circuit of said transformation means as a first video output signal,

motion detection means for generating an output of a predetermined value in correspondence to a level of at least one transformation component output from said transformation means,

second delay means for delaying a second video input signal by a predetermined time length,

third calculation means for outputting still another finite difference signal between said second video input signal and the second video input signal delayed by said second delay means,

multiplier for multiplying the finite difference signal output from said third calculation means by the output signal of said motion detection means in order to give nonlinear operation to said finite difference signal, and

fourth calculation means for outputting still another finite difference signal between said second video input signal and the output signal of said nonlinear operation means for a second video output signal.

5. A noise reduction apparatus in accordance with claim 1, 2, 3 or 4, wherein

said first video input signal is a luminance signal and said second video input signal is a color difference signal.

6. A noise reduction apparatus in accordance with claim 1, 2, 3 or 4, wherein

said predetermined time length of said first delay means and said second delay means are equal to the time length of at least one field of a video signal.

7. A noise reduction apparatus in accordance with claim 1, 2, 3 or 4, wherein

said predetermined time length of said first delay means and said second delay means are equal to the time length of at least one frame of a video signal.

8. A noise reduction apparatus in accordance with claim 1, 2, 3 or 4, wherein

said predetermined time length of said first delay means and said second delay means are equal to a scanning time of a predetermined number of scanning line of a video signal.

2. A noise reduction apparatus comprising:

first delay means for delaying a first video input signal by a predetermined time length,

first calculation means for outputting a finite difference signal between said first video input signal and the first video input signal delayed by said first delay means,

transformation means comprising

a transformation circuit for transforming said finite difference signal to a plurality of transformation components,

a nonlinear operation circuit for applying nonlinear operation to said transformation components, and

an inverse-transformation circuit for inverse-transforming said transformation components output from said nonlinear operation circuit,

second calculation means for outputting another finite difference signal between said first video input signal and an output signal of the inverse-transformation circuit of said transformation means for a first video output signal,

motion detection means for generating an output signal of a predetermined value in correspondence to a level of at least one of said transformation components,

second delay means for delaying a second video input signal by a predetermined time length,

third calculation means for outputting still another finite difference signal between said second video input signal and the second video input signal delayed by said second delay means,

a multiplier for multiplying the value of said finite difference signal output from said third calculation means by the value of the output of said motion detection means, and

fourth calculation means for outputting still another finite difference signal between said second video input signal and said output signal of said multiplier for a second video output signal.

3. A noise reduction apparatus comprising:

first delay means for delaying a first video input signal by a predetermined time length,

first calculation means for outputting a finite difference signal between said first video input signal and the first video input signal delayed by said first delay means,

first transformation means comprising

a transformation circuit for transforming said finite difference signal into a plurality of first transformation components,

a nonlinear operation circuit for applying nonlinear operation to said first transformation components and

an inverse-transformation circuit for inverse-transforming said first transformation components output from said nonlinear operation circuit,

second calculation means for outputting another finite difference signal between said first video input signal and an output signal of the inverse-transformation circuit of said transformation means for a first video output signal,

motion detection means for generating the output of a predetermined value in correspondence to the level of at least one of said transformation components,

second delay means for delaying a second video input signal by a predetermined time length,

third calculation means for outputting still another finite difference signal between said second video input signal and the second video input signal delayed by said second delay means,

second transformation means comprising

a transformation circuit for transforming said finite difference signal output from said third calculation means into a plurality of second transformation components,

nonlinear operation circuit for applying nonlinear operation to said second transformation components on the basis of the output signal of said motion detection means, and

an inverse-transformation circuit for inverse-transforming said second transformation components output from said nonlinear operation circuit, and

fourth calculation means for outputting still another finite difference signal between said second video input signal and an output signal of the inverse-transformation circuit of said transformation means for a second video output signal.

4. A noise reduction apparatus comprising:

first delay means for delaying a first video input signal by a predetermined time length,

first calculation means for outputting a finite difference signal between said first video input signal and the first video input signal delayed by said first delay means,

first transformation means comprising

a transformation circuit for transforming said finite difference signal into a plurality of first transformation components,

a nonlinear operation circuit for applying nonlinear calculation to said first transformation components and

an inverse-transformation circuit for inverse-transforming said first transformation components output from said none linear calculation circuit,

second calculation means for outputting another finite difference signal between said first video input signal and an output signal of the inverse-transformation circuit said transformation means for a first video output signal,

motion detection means for generating an output signal of a predetermined value in correspondence to the level of at least one of said transformation components,

second delay means for delaying a second video input signal by a predetermined time length,

third calculation means for outputting still another finite difference signal between said second input signal and the second video input signal delayed by said second delay means,

second transformation means comprising

a transformation circuit for transforming said finite difference signal output from said third calculation means into a plurality of second transformation components,

a nonlinear operation circuit for applying nonlinear operation to said second transformation components and

an inverse-transformation circuit for inverse-transforming said second transformation components output from nonlinear operation circuit,

multiplier for multiplying an output signal of the inverse-transformation circuit of said second transformation means by the output signal of said motion detection means, and

fourth calculation means for outputting still another finite difference signal between said second video input signal and an output signal of the inverse-transformation circuit of said second transformation means for a second video output signal.