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Stress sensitive P-N junction devices formed from porous silicon and methods for producing the same

  • US 5,405,786 A
  • Filed: 04/29/1994
  • Issued: 04/11/1995
  • Est. Priority Date: 12/16/1993
  • Status: Expired due to Term
First Claim
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1. A method of fabricating a stress sensitive semiconductor device comprising the steps of:

  • providing a first substrate of a semiconductor material having a given conductivity;

    forming a porous region on said first substrate, said porous region being of said given conductivity;

    doping said porous region to a depth with a dopant having a conductivity opposite to said given conductivity, wherein said selected depth of said porous region having said dopant and said porous region forms an array of p-n junctions extending therethrough; and

    growing a layer of said semiconducting material on said porous region, said layer being of said conductivity opposite to said given conductivity, wherein said porous region, said selected depth of said porous region having said dopant and said layer form a single large area p-n junction.

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