Semiconductor device having a metalized via hole

• US 5,406,125 A
• Filed: 04/15/1993
• Issued: 04/11/1995
• Est. Priority Date: 04/15/1993
• Status: Expired due to Fees

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Martin Marietta Corporation
• Inventors: Medley, Michael D., Johnson, Gerald E.
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): WHITEHEAD JR, CARL W
• Application Number:
  US08/000,227
• Time in Patent Office: 726 Days
• Field of Search: 257/734, 257/737, 257/738, 257/758, 257/774, 257/775, 257/777, 257/644, 333/247, 333/248
• US Class Current: 257/774
• CPC Class Codes: H01L 2223/6616 Vertical connections, e.g. vias
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/45014 Ribbon connectors, e.g. rectangular cross-section
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/642 Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/1423 Monolithic Microwave Integrated Circuit [MMIC]
• CPC Class Codes: H01L 2924/15151 the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/16152 Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/206 Length ranges
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

A semiconductor device having a metalized via hole used when mounting and connecting semiconductor chips, such as microwave chips, digital chips, analog chips and the like, on a top portion of a metalized carrier substrate is described herein. Each chip includes electrical circuitry on a top portion thereof with the circuitry connected to one end of a transmission line. Another end of the transmission line is connected to a metalized via hole. The via hole passes from the top portion of the chip to a bottom portion of the chip. The chip when mounted on the substrate is positioned over the top portion of the substrate and lowered thereon either by hand or with a mechanical chip carrying device. The bottom portion of the metalized via hole is indexed over a top of one end of a transmission line on the top portion of the substrate with the indexing tolerance between the two interfacing surfaces in a range of 0.5 to 10 mils. The close tolerance of less than one mil and up to 10 mils or greater may vary depending on the frequency of the application. Also, the close tolerance of the connection allows for proper alignment and uniform impedance transition between the chip and the substrate. After indexing the bottom of the via hole on top of the end of the transmission line on the substrate, the chip is bonded to the substrate. The semiconductor chip may be attached to the carrier substrate using solder. A very thin layer of solder is used to minimize thermal and electrical resistance and to establish a necessary integrity of chip-to-substrate interface attachment.

Claims

1. A semiconductor chip, such as a microwave chip, a digital chip, an analog chip and the like, for mounting on a metalized carrier substrate such as a mother board and connecting to a circular geometric shape of one end of a substrate transmission line, the chip having electrical circuitry on a top portion thereof, the chip comprising:

at least one chip signal transmission line, one end of said transmission line connected to the circuitry, and;

a metalized chip signal transmission via hole, said transmission via hole extending from the top portion of the chip to a bottom portion of the chip, another end of said transmission line connected to said transmission via hole, said transmission via hole having a metalized bottom portion having a circular geometric shape corresponding to the circular geometric shape of one end of the substrate transmission line.

2. The semiconductor chip as described in claim 1 further including at least one metalized chip ground via hole for grounding the chip on the substrate, said ground via hole extending from the top portion of the chip to a bottom portion of the chip and engaging a metalized surface on the top portion of the substrate.

3. The semiconductor chip as described in claim 2 wherein a bottom portion of said ground via hole engages a periphery around a hole through a metalized surface in the top of the substrate.

4. The semiconductor chip as described in claim 1 further including a pair of metalized chip ground via holes for grounding the chip on the substrate, said ground via holes disposed on opposite sides of said transmission via hole and extending from the top portion of the chip to a bottom portion of the chip and engaging a metalized surface on the top portion of the substrate.

5. The semiconductor chip as described in claim 4 wherein a bottom portion of said ground via holes engages a periphery around a pair of holes through a metalized surface in the top of the substrate.

6. The semiconductor chip as described in claim 1 wherein the metalized bottom portion of said transmission via hole has an annular shape corresponding to an annular shape of one end of the substrate transmission line.

7. The semiconductor chip as described in claim 1 further including a microcover for receipt on the top portion of the chip and disposed around a periphery of the top portion of the chip and hermetically sealed thereto.

8. The semiconductor chip as described in claim 1 further including a plurality of transmission via holes connected to a plurality of chip signal transmission lines connected to the circuitry.

9. The semiconductor chip as described in claim 8 wherein said transmission via holes are disposed on the chip inwardly and away from a periphery of the top portion of the chip.

10. A semiconductor chip, such as a microwave chip, a digital chip, an analog chip and the like, for mounting on a metalized surface on top of a carrier substrate such as a mother board and connecting to an annular geometric shape of one end of a substrate transmission line, the chip having electrical circuitry on a top portion thereof, the chip comprising:

at least one chip signal transmission line, one end of said transmission line connected to the circuitry;

a metalized chip signal transmission via hole, said transmission via hole extending from the top portion of the chip to a bottom portion of the chip, another end of said transmission line connected to said transmission via hole, said transmission via hole having a metalized bottom portion having an annular geometric shape corresponding to the annular geometric shape of one end of the substrate transmission line, and;

a pair of metalized chip ground via holes for grounding the chip on the substrate, said ground via holes disposed on opposite sides of said transmission via hole and extending from the top portion of the chip to a bottom portion of the chip and engaging the metalized surface on the top portion of the substrate, said ground via holes having an annular bottom portion engaging a periphery around a pair of holes through the metalized surface in the top of the substrate.

11. The semiconductor chip as described in claim 10 further including a microcover for receipt on the top portion of the chip and disposed around a periphery of the top portion of the chip and hermetically sealed thereto.

12. The semiconductor chip as described in claim 10 further including a plurality of transmission via holes connected to a plurality of chip signal transmission lines connected to the circuitry.

13. The semiconductor chip as described in claim 12 wherein said transmission via holes are disposed on the chip inwardly and away from a periphery of the top portion of the chip.

14. A semiconductor chip, such as a microwave chip, a digital chip, an analog chip and the like, for mounting on a metalized surface on top of a carrier substrate such as a mother board and connecting to an annular geometric shape of one end of a plurality of substrate transmission lines, the chip having electrical circuitry on a top portion thereof, the chip comprising:

a plurality of chip signal transmission lines, one end of said transmission lines connected to the circuitry;

a plurality of metalized chip signal transmission via holes, said transmission via holes extending from the top portion of the chip to a bottom portion of the chip, another end of said transmission lines connected to said transmission via holes, said transmission via holes having a metalized bottom portion having an annular geometric shape corresponding to the annular geometric shape of one end of the substrate transmission lines;

a pair of metalized chip ground via holes for grounding the chip on the substrate, said ground via holes disposed on opposite sides of each of said transmission via holes and extending from the top portion of the chip to a bottom portion of the chip and engaging the metalized surface on the top portion of the substrate, said ground via holes having an annular bottom portion engaging a periphery around a pair of holes through the metalized surface in the top of the substrate, said transmission and ground via holes disposed on the chip inwardly and away from a periphery of the top portion of the chip; and

a microcover for receipt on the top portion of the chip and disposed around a periphery of the top portion of the chip and hermetically sealed thereto.