Floor-planning system for predetermining a layout for a PCB or an LSI based on a block diagram

• US 5,406,498 A
• Filed: 02/08/1993
• Issued: 04/11/1995
• Est. Priority Date: 02/06/1992
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Yabe, Shoji
• Primary Examiner(s): Weinhardt, Robert A.
• Application Number:
  US08/014,151
• Time in Patent Office: 792 Days
• Field of Search: 364/488, 364/489, 364/490, 364/491, 364/400, 364/401, 364/402, 395/908, 395/916, 395/919, 395/921
• US Class Current: 716/119
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement

Abstract

A floor-planning system of the present invention prepares a block diagram showing blocks and the connection status among the blocks. The floor-planning system inputs a block diagram, estimates the block sizes, and estimates the aspect ratio range possible for the blocks. The system refers to the estimated block sizes and the estimated aspect ratios to specify the shapes and the arrangement of the blocks in the layout area. The system displays the block arrangement and the connection status among the blocks. The block layout is stored as layout data and utilized in feasibility judgment for a layout area on an LSI or a PCB.

Claims

1. A floor-planning system comprising:

block diagram input means for inputting design parameters known at a time of initial block diagram design of a circuit, said design parameters including a plurality of square blocks indicating groups of desired functions of said circuit, connections between said square blocks and bit widths corresponding to each of said connections, said design parameters being input in a form of said block diagram,

block size estimation means for estimating sizes of blocks corresponding on a one-to-one basis to each of said square blocks in said block diagram, wherein said sizes of said blocks are estimated based on a number of gates corresponding to said functions associated with each of said corresponding square blocks and said bit widths corresponding to said connections between each of said corresponding square blocks and other of said square blocks;

aspect ratio estimation means for estimating a range of aspect ratios possible for said blocks,

block arrangement specification means for specifying shapes and arrangement of said blocks in a layout area based on said design parameters, said estimated block sizes and said estimated aspect ratios,

connection relation display means for displaying said arrangement of said blocks in said layout area and connections between said blocks, and

layout output means for outputting said blocks arranged in said layout area and said connections between said blocks in said layout area as displayed by said connection relation display means.

2. A floor-planning system of claim 1 wherein said block size estimation means calculates a size of one of said blocks based on a number of gates determined needed for performing said function of one of said square blocks corresponding to said one block, a wiring area determined to be needed by said one of said square blocks corresponding to said one block, and a number of input/output lines determined by bit-widths corresponding to said connections between said one of said square blocks corresponding to said one block and other of said square blocks.

3. A floor-planning system of claim 1 wherein said aspect ratio estimation means calculates an aspect ratio range based on dimensions of one or more components needed for said block by said block size estimation means as and an arrangement of said one or more components.

4. A floor-planning system of claim 1 wherein said block arrangement specification means judges whether said shapes of said blocks arranged in said layout area comply with said estimated block sizes and said block aspect ratios.

5. A floor-planning system comprising:

block diagram input means for inputting design parameters known at a time of initial block diagram design of a circuit, said design parameters including a plurality of square blocks indicating groups of desired functions of said circuits connections between said square blocks and bit widths corresponding to each of said connections, said design parameters being input in a form of said block diagram,

block size estimation means for estimating sizes of blocks corresponding on a one-to-one basis to each of said square blocks in said block diagram, wherein said sizes of said blocks are estimated based on a number of gates corresponding to said functions associated with each of said corresponding square blocks and said bit widths corresponding to said connections between each of said corresponding square blocks and other of said square blocks;

aspect ratio estimation means for estimating a range of aspect ratios possible for said blocks,

block arrangement specification means for specifying shapes and arrangement of said blocks in a layout area based on said design parameters, said estimated block sizes and said estimated aspect ratios,

control means for checking for circuit layout problems including overlapping of said blocks arranged in said layout area, sticking out of any of said blocks from said layout area as well as intersection, detour and improper signal flow in wiring and, if any of said circuit layout problems are found, instructing said block arrangement specification means to respecify said shapes and arrangement of said blocks in said layout area if said control means determines that sufficient vacant space exists on said layout area so that said circuit layout problem can be corrected by said respecifications and instructing modification of said block diagram by said block diagram input means if said vacant space is determined to be insufficient, and

layout output means for outputting said blocks arranged in said layout area and said connections between said blocks in said layout area as displayed by said connection relation display means.

6. A floor-planning system of claim 5 wherein said block size estimation means calculates a size of one of said blocks based on a number of gates determined needed for performing said function of one of said square blocks corresponding to said one block, a wiring area determined to be needed by said one of said square blocks corresponding to said one block, and a number of input/output lines determined by bit-widths corresponding to said connections between said one of said square blocks corresponding to said one block and other of said square blocks.

7. A floor-planning system of claim 5 wherein said aspect ratio estimation means calculates an aspect ratio range based on dimensions of one or more components needed for said block by said block size estimation means as and an arrangement of said one or more components.

8. A floor-planning system of claim 5 wherein said block arrangement specification means judges whether said shapes of said blocks arranged in said layout area comply with said estimated block sizes and said block aspect ratios.

9. A method of planning a layout of a circuit comprising the computer implemented steps of:

(a) inputting design parameters known at a time of initial design of a block diagram of said circuit, wherein said design parameters include a plurality of square blocks indicating groups of desired functions of said circuit, connections between said square blocks and bit widths corresponding to each of said connections;

(b) estimating sizes of blocks corresponding on a one to one basis to said square blocks, wherein said sizes of said blocks are estimated based on a number of gates corresponding to said functions associated with each of said corresponding square blocks and said bit widths corresponding to said connections between each of said corresponding square blocks and other of said square blocks;

(c) estimating a range of aspect ratios possible for each of said blocks based on said functions associated with each of said corresponding square blocks;

(d) specifying shapes and arrangements of said blocks onto a layout area based on said design parameters, said estimated block sizes and said estimated aspect ratios;

(e) checking said shapes of said blocks to ensure that each of said blocks conforms to said estimated block sizes and said estimated aspect ratios corresponding to each of said blocks;

(f) displaying connections of said blocks onto said layout area;

(g) checking said arrangements of said blocks onto said layout area to ensure that none of said blocks overlaps with any other of said blocks and that none of said blocks sticks out from said layout area;

(h) if any of said blocks are arranged incorrectly such that one of said blocks overlaps with said any other of said blocks or that one of said blocks sticks out from said layout area so as to create an arrangement problem, determining if there is any vacant space within said layout area so that said blocks can be rearranged such that none of said blocks overlap with another of said blocks and none of said blocks stick out from said layout area, and if there is said vacant space available, returning to step (d) for correcting said arrangement problem of said blocks by attempting a different arrangement of said blocks by using said vacant space to place a portion or all of some of said blocks into said layout area;

(i) checking said blocks arranged onto said layout area to determine if there are any wiring problems associated with any connections of one of said blocks to another of said blocks, and if there are determined to be one or more of said wiring problems, returning to step (d) in order to rearrange said blocks for correcting said wiring problems; and

(j) outputting a layout of said blocks arranged onto said layout area and said connections of said blocks with said other blocks on said layout area if none of said wiring problems and said arrangement problems are detected.