Method of manufacturing thin film transistors in a liquid crystal display apparatus

• US 5,407,845 A
• Filed: 10/13/1993
• Issued: 04/18/1995
• Est. Priority Date: 10/15/1992
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Fujitsu Limited
• Inventors: Matsumoto, Tomotaka, Ichimura, Teruhiko, Nasu, Yasuhiro
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): TRINH, MICHAEL MANH
• Application Number:
  US08/135,030
• Time in Patent Office: 552 Days
• Field of Search: 437/40, 437/913, 437/21, 437/41, 437/84, 437/51, 148/DIG. 150, 148/106
• US Class Current: 438/30
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/2236 from or into a plasma phase
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: Y10S 148/15 Silicon on sapphire SOS

Abstract

A first sheet of photomask is used when a gate electrode and a gate bus line are formed, a second sheet of photomask is used when patterning is applied to a semiconductor film which becomes an active layer of a transistor on the gate electrode, a third sheet of photomask is used when a pixel electrode, a source electrode, a drain electrode, a drain bus line and a drain bus terminal portion are formed, and a fourth sheet of photomask is used when a film on the drain bus terminal portion, the gate bus terminal portion and pixel portion is removed, thereby to form thin film transistors arranged in a matrix form.

Claims

1. A method of manufacturing thin film transistors in a liquid crystal display apparatus, comprising the steps of:

forming a gate electrode on a transparent insulating substrate;

growing a gate insulator film, a semiconductor active layer and an insulating channel protective film one after another on a region including said gate electrode and forming a pixel electrode transparent conductive film;

forming a photoresist pattern on said channel protective film and inside a position corresponding to the contour of said gate electrode;

patterning said channel protective film and said semiconductor active layer by etching said channel protective film and said semiconductor active layer using said photoresist pattern as a mask;

forming a pattern in which the contour of said channel protective film is positioned inside of the contour of said semiconductor active layer by applying side etching selectively to said channel protective film located between said photoresist pattern and said semiconductor active layer;

forming a contact region by introducing impurities into said semiconductor active layer exposed outside from the contour of said channel protective film; and

forming a source electrode and a drain electrode connected to said contact region and separated thereon.

2. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 1, wherein said semiconductor active layer is a silicon layer, said channel protective film is a silicon nitride film and said pixel electrode transparent conductive film is one of an indium tin oxide film, a tin oxide film an indium oxide film or a zinc oxide film.

3. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 1, wherein the method for forming said contact region by introducing impurities into said semiconductor active layer is a process of introducing gas containing either one of a hydride of a III group element or a V group element or a fluoride of a III group element or a V group element and inactive gas into a reduced pressure atmosphere and exposing said semiconductor active layer in a space of plasma generated in said atmosphere.

4. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 3, wherein said hydride of V group element or said fluoride of V group element is a hydride or a fluoride of phosphorus, and the phosphorus concentration in said contact region is within a range of 1×

10²⁰ to 5×

10²¹ /cm³.

5. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 3, wherein a source electrode and a drain electrode are formed on said contact region without wetting the surface of said contact region after forming said contact region by exposing said semiconductor active layer to the space of said plasma.

6. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 1, wherein said photoresist pattern is formed inside a position corresponding to the contour of said gate electrode by exposing, after forming unexposed positive type photoresist on said gate electrode and in the peripheral region thereof, said positive type photoresist using said gate electrode as a mask by exposing from the back of said transparent insulating substrate, and by developing said positive type photoresist thereafter.

7. A method of manufacturing thin film transistors in a liquid crystal display apparatus, comprising the steps of:

forming gate electrodes and gate bus lines conducting with said gate electrodes on a transparent insulating substrate

growing a gate insulator film, a semiconductor active layer and an insulating channel protective film one after another on a region including said gate electrodes and said gate bus lines;

forming a photoresist pattern on said channel protective film and inside a position corresponding to the contour of said gate electrode;

patterning said channel protective film and said semiconductor active layer remain on said gate electrodes by etching said channel protective film and said semiconductor active layer using said photoresist pattern as a mask;

forming a pattern in which the contour of said channel protective film is positioned inside of the contour of said semiconductor active layer by applying side etching selectively to said channel protective film located between said photoresist pattern and said semiconductor active layer;

forming a contact region by introducing impurities into said semiconductor active layer exposed outside from the contour of said channel protective film after said photoresist pattern is removed;

forming a multilayer structure film composed of a pixel electrode transparent conductive film and a metal film on a region including said channel protective film, said contact region, a drain bus region and a pixel region;

forming a source electrode and a drain electrode connected to said contact region and separated thereon and a drain bus line connected to said drain electrode by applying patterning to said multilayer structure film, and also remaining said multilayer structure film extending from said source electrode over to said pixel region;

removing a part of said contact region by means of etching using said source electrode, said drain electrode and said channel protective film as a mask; and

removing said metal film existing in said pixel region, thereby to use said exposed pixel electrode transparent conductive film as a pixel electrode.

8. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 7, comprising the steps before exposing said pixel electrode transparent conductive film in said pixel region of:

growing an insulating final protective film covering said metal film, said drain electrode, said drain bus line and said channel protective film;

forming an opening portion on said pixel forming region, drain bus terminal portion and gate bus terminal portion, respectively, by applying patterning to said final protective film;

removing said gate insulator film at a portion where said gate insulator film is revealed in said opening portion; and

removing said metal film at a portion where said metal film is revealed.

9. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 8, wherein:

said drain electrode and said drain bus line on said transparent insulating substrate are formed by applying patterning to a second multilayer structure film composed of a second pixel electrode transparent conductive film and a second metal film;

said drain bus terminal portion formed at the end portion of said drain bus line is formed of said second pixel electrode transparent conductive film; and

said second metal on said drain bus terminal portion is removed when said metal film in said pixel forming region is removed.

10. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 7, wherein the process after forming said contact region until depositing said multilayer structure film is performed consecutively in a reduced pressure atmosphere.

11. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 7, wherein said photoresist pattern is formed inside a position corresponding to the contour of said gate electrode by exposing, after forming unexposed positive type photoresist on said gate electrode and in the peripheral region thereof, said positive type photoresist using said gate electrode as a mask, and by developing said positive type photoresist thereafter by exposing from the back of said transparent insulating substrate.

12. A method of manufacturing thin film transistors in a liquid crystal display apparatus according to claim 11, wherein a fine throttle portion is formed in a longitudinal direction of the gate at the boundary portion between said gate electrode and said gate bus line, and said semiconductor active layer formed on said throttle portion is removed at the same time when said contact region protruding from said source electrode and said drain electrode is removed.