Circuit for protecting DC powered devices from improper supply voltages

• US 5,410,441 A
• Filed: 02/01/1993
• Issued: 04/25/1995
• Est. Priority Date: 02/01/1993
• Status: Expired due to Term

• Current Assignee: Motorola Solutions, Inc.
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Allman, Michael E.
• Primary Examiner(s): Deboer, Todd
• Application Number:
  US08/011,617
• Time in Patent Office: 813 Days
• Field of Search: 361/18, 361/84, 361/91, 361/50, 361/86, 361/51, 307/127
• US Class Current: 361/18
• CPC Class Codes: H02H 11/003 using a field effect transistor as protecting element in one of the supply lines
• CPC Class Codes: H02H 11/006 in case of too high or too low voltage

Abstract

A circuit for protecting direct current (DC) powered devices from excessive supply voltage and reverse polarity supply voltage comprises supply voltage coupling circuitry that operably couples a DC powered device to a supply voltage. The circuit also includes a first field effect transistor (FET) having an intrinsic diode operably coupled to the supply voltage coupling circuitry. Further, the circuit includes first current blocking circuitry operably coupled to the first FET for blocking current flow through the intrinsic diode. Still further, the circuit comprises gate supply circuitry operably coupled to the first FET and the supply voltage coupling circuitry to supply gate voltage to the first FET when the supply voltage is less than a predetermined value. Finally, the circuit includes second blocking circuitry operably coupled to the gate supply circuitry to block current flow to the gate supply circuitry when the supply current is reversely coupled to the DC powered device such that the gate supply circuitry does not supply gate voltage to the first FET.

Claims

1. A circuit for protecting direct current (DC) powered devices from excessive supply voltage and reverse polarity supply voltage, the circuit comprising:

supply voltage coupling means for coupling a DC powered device to a supply voltage;

a first field effect transistor (FET) having an intrinsic diode, wherein the first FET is operably coupled to the supply voltage coupling means;

first current blocking means, operably coupled to the first FET, for substantially blocking current flow through the intrinsic diode;

gate supply means, operably coupled to the first FET and the supply voltage coupling means, for supplying gate voltage to the first FET when the supply voltage is less than a predetermined value; and

second current blocking means, operably coupled to the gate supply means, for blocking current flow to the gate supply means when the supply voltage is reversibly coupled to the DC powered device such that the gate supply means does not supply gate voltage to the first FET.

2. The circuit of claim 1, wherein the supply voltage coupling means further functions to provide a supply line terminal and a return terminal.

3. The circuit of claim 2, wherein the first FET is operably coupled to the supply line terminal.

4. The circuit of claim 2, wherein the first FET is operably coupled to the return terminal.

5. The circuit of claim 1, wherein the first current blocking means further functions as a second FET, and wherein the source of the first FET is directly coupled to the source of the second FET.

6. A method for protecting direct current (DC) powered devices from excessive supply voltage and reverse polarity supply voltage, the method comprising the steps of:

a) determining whether voltage from a voltage source is above a predetermined voltage;

b) blocking the voltage from the voltage source when the voltage from the voltage source is above the predetermined voltage thereby blocking the voltage from the DC powered device;

c) determining whether the voltage source is connected in a reverse polarity manner; and

d) blocking the voltage from the voltage source when the voltage source is connected in the reverse polarity manner thereby blocking the voltage from the DC powered device.