Mechanism for rerouting and dispatching interrupts in a hybrid system environment

• US 5,410,709 A
• Filed: 12/17/1992
• Issued: 04/25/1995
• Est. Priority Date: 12/17/1992
• Status: Expired due to Term

• Current Assignee: Bull HN Information Systems Incorporated (Atos SE)
• Original Assignee: Bull HN Information Systems Incorporated (Atos SE)
• Inventors: Yu, Kin C.
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US07/992,209
• Time in Patent Office: 859 Days
• Field of Search: 395/725, 395/325, 395/275, 395/800, 395/650, 395/500
• US Class Current: 710/269
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence

Abstract

A hybrid system environment includes a proprietary operating system and processing unit and a non-proprietary operating system (UNIX based) and processing unit tightly coupled to a system bus in common with a main memory and a plurality of controllers which include a number of multiline communications controllers and communicates through a common area of main memory. Terminal connections to the communications controllers for virtual terminal processing are made through a UNIX virtual terminal driver and system proprietary communications software components which include a server, network terminal driver (NTD) and multiplexer driver modules. The UNIX based operating system further includes a multiplexer terminal driver and a switching mechanism which is included within the virtual terminal driver. The mechanism enables switching from virtual terminal processing to direct terminal processing wherein communications is established between the multiplexer terminal driver and the communications controllers. An interrupt dispatching mechanism enables interrupts from the controllers to be rerouted to the multiplexer terminal driver and properly dispatched to the driver interrupt handler routines on the basis of line number thereby reducing processing delays.

Claims

1. An interrupt dispatcher mechanism for use in a data processing system which comprises a first central processing unit (CPU) operating under the control of a first operating system, a main memory and a number of controllers having a plurality of lines connected to a number of terminals, said number of controllers being tightly coupled to said first CPU and to said main memory, a common hardware interrupt register operatively connected to said plurality of controllers for receiving interrupt requests therefrom, each interrupt request including channel number information designating an interrupting controller, said main memory, a first memory area for storing system and application components including a number of terminal drivers for operatively connecting to said first operating system controller terminals previously connected to operate under a second operating system which is different in said data processing system from said first operating system and operates under the control of a second CPU of said data processing system, said interrupt dispatcher mechanism comprising:

an interrupt control table having a plurality of groups of locations organized on a channel basis so as to be indexed according to channel number;

an interrupt dispatcher module including a function processing module and a dispatching function module, said function processing module being operatively coupled to said number of terminal drivers and to said interrupt control table and said dispatching function module being operatively coupled to said common hardware interrupt register, to said number of terminal drivers and to said interrupt control table, said function processing module in response to each first type of call from one of said drivers including a channel number designating a controller channel on which an open command from said driver was received, said function processing module using said channel number to index into said interrupt control table for registering interrupt handlers utilized by said driver by writing into locations designated by said channel number, interrupt handler and user data information; and

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said dispatching function module in response to each interrupt subsequently received from any one of said controllers stored in said hardware interrupt register, indexing into said interrupt control table using said channel number for obtaining said interrupt handler and user data information required for dispatching said interrupt to an interrupt handler designated by said information.

2. The system of claim 1 wherein said first memory area further includes a number of interrupt pending register locations for storing processing unit number and interrupt level information linked with each of said number of drivers, said function processing module including means in response to each second type of call from said driver made in response to said open command, reading said interrupt pending register locations, said function processing module returning said processing unit and interrupt level information to said driver for transfer to each channel of one of said controllers corresponding to one of said terminals which caused said open command to be issued for automatically rerouting all controller channel interrupts to said dispatcher interrupt mechanism.

3. The system of claim 2 wherein each of said controllers includes a memory for storing a plurality of channel control programs (CCPs) for controlling activities of a corresponding number of channels, said driver upon receipt of said processing unit and interrupt level information issuing to each channel, a plurality of interrupt control words containing said interrupt control information to replace previously stored interrupt control words for use by a corresponding one of said CCPs in generating interrupt request for said channels.

4. The system of claim 3 wherein said system includes a plurality of first processing units, each designated by a different central processing number and wherein said first operating system utilizes a plurality of interrupt levels for allocating processing priorities, said interrupt control information including a central processing number designating which of said plurality of first processing units is assigned for processing all interrupts from said controller and an interrupt level designating processing priority.

5. The system of claim 1 wherein said function processing module further includes termination routine means in response to a third type of call received from said driver indicating receipt of a close command, indexing into said interrupt control table using said channel number, said termination routine means deregistering said interrupt handlers utilized by said driver by clearing those locations designated by said channel number.

6. The system of claim 1 wherein said user data information includes line number information designating which one of said plurality of lines is being serviced by said channel and wherein said first memory area includes a table containing a plurality of entries, each containing information pertaining to the status of a different one of said lines, said dispatching function module passing said line number information to said interrupt handler designated by said information for accessing line specific data structures through said channel table for facilitating processing of said interrupt.

7. The method of claim 1 wherein said information entries stored in said interrupt control table are coded to designate any one of a number of different interrupt handlers for processing interrupts.

8. The method of claim 1 wherein said information entries stored in said interrupt control table are coded to designate a common interrupt handler for processing interrupts.

12. The method of claim 7 wherein said information entries include line number information and wherein said memory includes a table containing a plurality of entries, each storing information pertaining to the status of a different one of a plurality of lines, said step (e) of said method further including the step of passing said line number information as an argument to said interrupt handler and said interrupt handler using said line number information to access said table for facilitating processing of said interrupt.

9. A method of facilitating dispatching of interrupts received by a terminal driver from any one of a number of multiline controllers during the execution of application programs by a data processing system which includes a central processing unit operating under the control of a first operating system and a main memory for storing said first operating system, said method comprising the steps of:

(a) creating an interrupt control table having a plurality of locations for storing information entries on a channel basis;

(b) storing interrupt dispatcher routines in said main memory accessible to said terminal driver, said routines including a number of function processing routines and a number of interrupt dispatching routines;

(c) issuing in response to each open command received by said terminal driver, a first type of call to said interrupt dispatcher routines;

(d) registering in response to said first call, an interrupt handler of said driver by said function processing routines which is to process said interrupts by indexing into said interrupt control table using channel number information provided by said driver and storing information entries in locations designated by said channel number, said information entries designating driver interrupt handlers for processing said interrupts and predetermined user data information for facilitating said processing; and

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(e) indexing into said interrupt control table in response to each interrupt received from one of said controllers by said interrupt dispatching routines using channel number information provided by said one of said controllers for obtaining said information entries in locations designated by said channel number to dispatch said interrupt to an interrupt handler designated by said driver for processing said interrupt.

10. The method of claim 9 wherein said step (c) of said method further includes the step of said terminal driver issuing a second type of call to said interrupt dispatcher routines and wherein step (d) of said method further includes the steps of:

(f) in response to said second type of call, said function processing routines obtaining driver configuration information from said memory corresponding to predetermined processing unit and interrupt level information linked with said driver; and

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(g) transferring said predetermined processing unit and interrupt level information to said one of said controllers for automatically rerouting all controller channel interrupts to said dispatcher interrupt routines for processing.

11. The method of claim 9 wherein said method further includes the steps of:

(h) in response to a third type of call received from said driver indicating receipt of a close command from an application, indexing into said interrupt control table using said channel number; and

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(i) deregistering said interrupt handlers utilized by said driver for processing interrupts received from the channel by clearing the entries stored in those locations designated by said channel number.