Power-management system for a computer

• US 5,410,713 A
• Filed: 01/02/1992
• Issued: 04/25/1995
• Est. Priority Date: 01/02/1992
• Status: Expired due to Term

• Current Assignee: Acer, Inc., Wistron Corporation
• Original Assignee: Smith Corona/Acer
• Inventors: Lee, Suh C., Lee, Yen W., Chen, James, White, Dave, Barbieri, Ray, Ang, Rod
• Primary Examiner(s): MacDonald, Allen R.
• Assistant Examiner(s): DAVIS, GEORGE B
• Application Number:
  US07/816,108
• Time in Patent Office: 1,209 Days
• Field of Search: 395/750, 395/575, 395/725, 365/226, 365/229, 364/707, 307/66
• US Class Current: 713/330
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3246 by software initiated power-off
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 9/4418 Suspend and resume; Hibernate and awake
• CPC Class Codes: H02J 7/0031 using battery or load disconnect circuits H02J9/002 takes precedence
• CPC Class Codes: H02J 9/005 using a power saving mode for copiers G03G15/5004
• CPC Class Codes: H02J 9/061 for DC powered loads

Abstract

A power management system for a personal computer comprises a power management processor, a switchable power supply and a keep alive power supply. The processor is powered by the keep alive power supply that continuously provides power. The computer is powered by a power supply that is switchable in response to a control signal. The processor preferably controls the switchable power supply. The processor is coupled to receive external device interrupts from a plurality of external devices that instruct the processor when to turn the switchable power supply on and off. The processor is also coupled to the computer through an interface. The power management system also includes a method for turning the computer on and off. A preferred method uses the processor to control the power provided to the computer. The preferred method also uses the processor to dictate whether the computer will to perform a long boot that brings the computer to an operational state, identifies the computer'"'"'s configuration, and tests memory, or a short boot that brings the computer to an operational state in a much shorter time. A preferred method for turning the computer off includes the ability to exit a program being run by the computer, and saving a hardware state of the computer on a hard disk.

Claims

1. A system for supplying power to a computer in response to interrupts from external devices, said system comprising:

a first power supply having an input and an output for converting an AC voltage to a DC voltage, the input coupled to a first AC voltage source to receive AC voltage;

a second power supply having a voltage input, a control input and an output for converting an AC voltage to a DC voltage in response to a control signal, said input coupled to said AC voltage source to receive AC voltage in parallel with said first power supply, said output coupled to supply power to the computer; and

a power management processor having a power input, the power input of the power management processor connected to the output of the first power supply wherein said power management processor is powered by said first power supply, an output of the power management processor connected to the control input of the second power supply wherein the output of the power management processor provides control signals to said second power supply, control inputs and outputs coupled to the computer, and interrupt inputs coupled to the external devices to receive interrupts from the external devices.

2. The system of claim 1 wherein the power management processor is a microprocessor.

3. The system of claim 1 wherein one of the external devices is a switch and wherein the second power supply supplies power when the switch is closed.

4. The system of claim 1 wherein the processor outputs long boot and short boot commands to the computer and is capable of sending an interrupt to the computer, and the computer performs different power up functions as directed by the boot command received from the power management processor.

5. The system of claim 1 wherein the power management processor includes a device for keeping time, and logic for outputting the control signal to the second power supply when the time reaches predetermined values.

6. The system of claim 1 wherein the power management processor comprises memory for storing tasks to be performed by the power management processor.

7. A method for controlling with a power management processor the power supplied to a computer, wherein said computer can perform any of a plurality of boot processes, said method comprising the steps of:

continuously supplying power to the power management processor;

monitoring external device interrupt lines coupled to the power management processor;

if an external device interrupt is received in the power management processor, supplying power to the computer by sending a control signal from the power management processor to a switchable power supply, the switchable power supply being coupled to the computer for supplying power thereto; and

sending a boot status command from the power management processor to the computer to identify which boot process of said plurality of boot processes the computer is to perform.

8. The method of claim 7, wherein said computer has at least one identifiable configuration, and wherein said computer includes testable memory and wherein the step of sending may send one of:

a long boot command that brings the computer to an operational state, identifies the computer'"'"'s configuration, and tests memory; and

a short boot command that brings the computer to an operational state.

9. The method for turning off the power provided to a computer from a first power source with a power management processor having a second power source, the computer being capable of performing a plurality of operations, including a save state operation said method comprising the steps of:

supplying power to the power management processor with the second power source;

monitoring external device interrupt lines coupled to the power management processor;

sending a signal from said power management processor to the computer when an external device interrupt is received by said power management processor;

performing said save state operation with the computer in response to said step of sending a signal;

sending tasks from the computer to the power management processor;

switching off the first power source by the power management processor; and

performing the tasks using the power management processor.

10. The method of claim 9, wherein the step of performing the save state operation includes performing while the computer is running a program, the steps of:

exiting, by the computer, the program that the computer is running;

storing, by the computer a first state of a computer, hardware to a non-volatile media; and

storing, by the computer, a second state of a memory to a non-volatile media.