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Data processing apparatus dual-bus data processing with reduced cpu and memory requirements

  • US 5,412,488 A
  • Filed: 05/22/1992
  • Issued: 05/02/1995
  • Est. Priority Date: 05/24/1991
  • Status: Expired due to Term
First Claim
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1. A data processing apparatus comprising:

  • a microprocessor for controlling the entire apparatus;

    a first bus connected to said microprocessor;

    at least one second bus which is not connected to said microprocessor;

    a memory connected to both said first and second buses and allowing access from each of said buses;

    at least one processing circuit connected to said second bus and adapted to perform a predetermined process with respect to given data under the control of said microprocessor; and

    DMA means connected to said first and second buses and adapted to perform a data transfer process on said second bus to or from at least one of said processing circuit and said memory on the basis of an instruction through said first bus from said microprocessor.

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