Power management initialization for a computer operable under a plurality of operating systems

• US 5,414,860 A
• Filed: 01/29/1991
• Issued: 05/09/1995
• Est. Priority Date: 01/29/1991
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Incorporated (International Business Machines Corporation)
• Inventors: Parthasarathy, Sivagnanam, Canova, Francis J. Jr.
• Primary Examiner(s): Lee, Thomas C.
• Application Number:
  US07/649,785
• Time in Patent Office: 1,561 Days
• Field of Search: 364/200, 364/900, 395/750, 395/700
• US Class Current: 713/340
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 9/4406 Loading of operating system

Abstract

Power management interrupt enabling is done after completion of POST by loading either DOS or OS/2 operating systems in accordance with whichever operating system the computer is setup to operate under. After being loaded, the operating system then enables the PMIs. This provides a very simple solution that allows the PMIs to be used in a computer operable under a plurality of operating systems.

Claims

1. A battery operated computer comprising:

a main processor operable in a real mode and in a protected mode;

a main memory for storing application programs and an operating system for execution by said processor, said operating system being one of a group of a disk operating system (DOS) executable during said real mode of operation of said main processor and a multitasking operating system (MOS) executable in said protected mode of operation of said main processor;

a read only memory (ROM) storing a plurality of power management interrupt handling (PMIH) routines;

power management means for monitoring environmental and battery conditions in said computer and generating power management interrupts (PMIs) in response to predetermined changes in said environmental and battery conditions;

and initialization means operative in response to turning on said computer to load one of said operating systems and place said computer in readiness for execution of an application program, said initialization means comprising

a power on self test (POST) program stored in said ROM means, said POST program being executed by said main processor in response to said computer being turned on, to test said computer without enabling said PMIs;

loading means operable when said POST program has completed, to load one of said operating systems into said main memory in accordance with a system setup which determines which operating system said computer will be operated under;

first means operable when said DOS has been loaded into said main memory to enable said PMIs and link said PMIH routines to said PMIs;

and second means operable when said MOS has been loaded into said main memory to first load a power management driver and to then enable said PMIs and link said PMIH routines to said PMIs.

2. A computer in accordance with claim 1 comprising:

an interrupt controller connected to said processor and having a selectively gated PMI input line for receiving said PMIs, said interrupt controller being operative to transmit a PMI interrupt to said processor when said PMI input line is gated;

said first and second means being operable to gate said PMI input line and thereby enable said PMIs.

3. A computer in accordance with claim 2 comprising:

a power management basic input output system (BIOS) stored in said ROM and including a callable wait-on-key BIOS routine forming part of said first means whereby in response to a first instance of calling such wait-on-key routine after said computer has been turned on, said PMIs are enabled by said wait-on-key routine.

4. A computer in accordance with claim 3 wherein:

said second means is operable to load a kernel of said MOS into said main memory before loading said power management driver, and said second means is further operable after enabling said PMIs to thereafter stop said processor and await an interrupt.

5. A method of initializing a battery operated computer having a main processor operable in a real mode and in a protected mode, a main memory for storing application programs and an operating system for execution by said processor, power management means for monitoring environmental and battery conditions and generating power management interrupts (PMIs) in response to predetermined changes in said environmental and battery conditions, and a read only memory (ROM) storing power management interrupt handlers (PMIHs) for handling said PMIs, said method comprising the steps of:

executing a power on self test (POST) program without enabling said PMIs;

upon completion of execution of said POST program, loading into said main memory an operating system from the group of a disk operating system (DOS) executable in said real mode and a multitasking operating system (MOS) executable in said protected mode, the operating system to be loaded being determined by system setup;

and thereafter enabling said PMIS in accordance with which one of said operating systems is loaded into said main memory whereby said processor is operative upon enabling said PMIs to thereafter execute one of said PMIHs in response to an occurrence of one of said PMIs.

6. A method in accordance with claim 5 wherein said computer comprises an interrupt controller having a PMI line for receiving said PMIs, and said PMIs are enabled by gating said PMIs into said interrupt controller through said PMI line.

7. A method in accordance with claim 5 comprising shutting off said processor after said PMIs are enabled, until an interrupt occurs.