Controlled-feedback packet switching system
First Claim
Patent Images
1. A packet switching system comprising:
- at least one switching block having a plurality of input and output ports;
a control circuit for determining a) priority levels of packets received by the input ports and b) delivery time of packets to the output ports;
a plurality of recirculation delay elements, each one of which is connected to a dedicated input port and a dedicated output port; and
means for buffering a lower-priority packet which is contending for an output port with one or more higher-priority packets, in a selected one of the recirculation delay elements based on the priority level of the lower-priority packet as determined by the control circuit.
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Abstract
Packets or cells received from different input ports of a switch and destined for a common output port of that switch, are analyzed to determine their priority level. Lower-priority packets or cells are buffered in recirculation delay lines of appropriately-selected lengths, and thereafter scheduled for transmission to the output port based on their level of priority.
110 Citations
14 Claims
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1. A packet switching system comprising:
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at least one switching block having a plurality of input and output ports; a control circuit for determining a) priority levels of packets received by the input ports and b) delivery time of packets to the output ports; a plurality of recirculation delay elements, each one of which is connected to a dedicated input port and a dedicated output port; and means for buffering a lower-priority packet which is contending for an output port with one or more higher-priority packets, in a selected one of the recirculation delay elements based on the priority level of the lower-priority packet as determined by the control circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. Apparatus for use in a packet switching system comprising:
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means for determining the level of priority of incoming packets received from different input ports of the packet switching system and destined for a common output port of the packet switching system; means for routing the highest priority packet to the output port; means for buffering in selected ones of a plurality of recirculation delay lines lower-priority packets; and means for scheduling delivery to the output port of the lower-priority packets buffered in the recirculation delay lines based on their determined level of priority. - View Dependent Claims (9, 10)
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11. A method of routing packets in a switch comprising:
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determining levels of priority of incoming packets received from different input ports of the switch and destined for a common output port of the switch; routing the highest priority packet to the output port; buffering in selected ones of a plurality of recirculation delay lines lower-priority packets; and scheduling delivery to the output port of the lower-priority packets buffered in the recirculation delay lines based on their determined level of priority.
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12. A packet switching system comprising:
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a switching fabric having at least one switching block with a plurality of input and output ports; a plurality of recirculation delay elements, each one of which is connected to a dedicated input port and a dedicated output port of the switching fabric; a control circuit for a) determining levels of priority of packets received from the input ports, and b) selecting one of the recirculation delay elements through which, one or more lower-priority packets contending for one of the output ports with one or more higher priority packets is returned to the switching fabric at least once. - View Dependent Claims (13, 14)
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Specification