Low jitter ring oscillators

• US 5,418,498 A
• Filed: 04/15/1994
• Issued: 05/23/1995
• Est. Priority Date: 04/15/1994
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: McNeill, John A., DeVito, Lawrence M.
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US08/228,072
• Time in Patent Office: 403 Days
• Field of Search: 331/57, 331/111, 331/113 R, 331/175, 307/608, 330/252, 330/253, 330/254, 330/257-261, 327/246, 327/538, 327/256, 327/551, 327/260, 327/290, 327/231, 327/233
• US Class Current: 331/57
• CPC Class Codes: H03K 3/0231 Astable circuits H03K3/0315 takes precedence

Abstract

Low jitter ring oscillators are disclosed. The oscillators obtain their low jitter through the use of gates (100) and interpolators (160) having time delays of superior stability. The stability is obtained with decoupling networks (140) and delay replica generators (222) that isolate power supply noise from critical circuit parameters.

Claims

1. A differential gate, comprising:

a voltage supply structure that is subject to noise;

a differential amplifier supplied by said voltage supply structure;

a current source connected to provide a current flow through said differential amplifier; and

a noise decoupling network that responds to noise on said voltage supply structure by coupling a sample thereof to said current source to oppose noise coupled from said voltage supply structure through said differential amplifier.

2. The gate of claim 1 wherein said decoupling network includes;

a first circuit connecting said differential amplifier and said current source and configured for current conduction therebetween; and

a second circuit connecting said voltage supply structure with said current source and configured for conduction thereto of said sample.

3. The gate of claim 2 wherein;

said first circuit includes a resistor coupling said differential amplifier and said current source; and

said second circuit includes a capacitor coupling said current source to said voltage supply structure.

4. A differential gate, comprising:

a voltage supply structure that is subject to noise;

a differential amplifier supplied by said voltage supply structure;

a current source connected to provide a current flow through said differential amplifier; and

a noise decoupling network that responds to noise on said voltage supply structure by coupling a sample thereof to said current source to oppose noise coupled from said voltage supply structure through said differential amplifier;

wherein said decoupling network includes;

a first circuit connecting said differential amplifier and said current source and configured for current conduction therebetween; and

a second circuit connecting said voltage supply structure with said current source and configured for conduction thereto of said sample; and

wherein;

said first circuit includes a resistor coupling said differential amplifier and said current port; and

said second circuit includes;

a signal delay circuit coupled to said voltage supply structure and configured to provide at a delay circuit output a time delayed sample of said noise on said voltage supply structure; and

a capacitor coupling said current source and said delay circuit output.

5. An interpolator, comprising:

a voltage supply structure that is subject to noise;

first and second differential amplifiers supplied by said voltage supply structure;

a current source having first and second current ports coupled respectively to said first and second differential amplifiers; and

at least one noise decoupling network that responds to noise on said voltage supply structure by coupling a sample thereof to a selected one of said current ports to oppose noise coupled thereto by the associated one of said differential amplifiers from said voltage supply structure.

6. The interpolator of claim 5 wherein said decoupling network includes;

a first circuit connecting said associated differential amplifier and said selected current port and configured for current conduction therebetween; and

a second circuit connecting said voltage supply structure with said selected current port and configured for conduction thereto of said sample.

7. The interpolator of claim 6 wherein;

said first circuit includes a resistor coupling said associated differential amplifier and said selected current port; and

said second circuit includes a capacitor coupling said selected current port and said voltage supply structure.

8. An interpolator, comprising:

a voltage supply structure that is subject to noise;

first and second differential amplifiers supplied by said voltage supply structure;

a current source having first and second current ports coupled respectively to said first and second differential amplifiers; and

at least one noise decoupling network that responds to noise on said voltage supply structure by coupling a sample thereof to a selected one of said current ports to oppose noise coupled thereto by the associated one of said differential amplifiers from said voltage supply structure;

wherein said decoupling network includes;

a first circuit connecting said associated differential amplifier and said selected current port and configured for current conduction therebetween; and

a second circuit connecting said voltage supply structure with said selected current port and configured for conduction thereto of said sample;

and wherein;

said first circuit includes a resistor coupling said associated differential amplifier and said selected current port; and

said second circuit includes;

a signal delay circuit coupled to said voltage supply structure and configured to provide at a delay circuit output a time delayed sample of said noise on said voltage supply structure; and

a capacitor coupling said current port and said delay circuit output.

9. A ring oscillator, comprising:

a plurality of gates serially connected therebetween to form a ring wherein at least one of said gates includes;

a voltage supply structure that is subject to noise;

a differential amplifier supplied by said voltage supply structure;

a current source connected to provide a current flow through said differential amplifier; and

a noise decoupling network that responds to noise on said voltage supply structure by coupling a sample thereof to said current source to oppose noise coupled from said voltage supply structure through said differential amplifier.

10. A ring oscillator, comprising:

a plurality of interpolators; and

a plurality of gates;

said interpolators and said gates serially connected in the form of a ring with each of said interpolators preceded by at least one of said gates;

wherein at least one of said interpolators includes;

a voltage supply structure that is subject to noise;

first and second differential amplifiers supplied by said voltage supply structure;

a current source having first and second current ports coupled respectively to said first and second differential amplifiers; and

at least one noise decoupling network that responds to noise on said voltage supply structure by coupling a sample thereof to a selected one of said current ports to oppose noise coupled thereto by the associated one of said differential amplifiers from said voltage supply structure.

11. A method of stabilizing the input/output delay of a differential gate that includes a differential amplifier connected to a first voltage supply and a current source that is connected to a second voltage supply and draws current through said differential amplifier, comprising the steps of;

coupling noise signals appearing on said first voltage supply to said current source; and

opposing noise signals coupled through said differential amplifier from said first voltage supply with said coupled noise signals to stabilize the amplifier'"'"'s switching time.

12. A method of stabilizing the input/output delay of a differential gate that includes a differential amplifier connected to a first voltage supply and a current source that is connected to a second voltage supply and draws current through said differential amplifier, comprising the steps of:

delaying noise signals appearing on said first voltage supply structure to form a time delayed noise signal; and

coupling said delayed noise signal to said current source to oppose noise signals coupled through said differential amplifier from said first voltage supply and thereby stabilize the amplifier'"'"'s switching time.

13. A method of stabilizing the input/output delay of an interpolator that includes first and second differential amplifiers connected to a first voltage supply and a current source that is connected to a second voltage supply to selectably steer currents through said first and second differential amplifiers, comprising the steps of;

coupling noise signals appearing on said first voltage supply to said current source; and

opposing noise signals coupled through said differential amplifier from said first voltage supply with said coupled noise signals to stabilize the amplifier'"'"'s switching time.

14. A method of stabilizing the input/output delay of an interpolator that includes first and second differential amplifiers connected to a first voltage supply and a current source that is connected to a second voltage supply to selectably steer currents through said first and second differential amplifiers, comprising the steps of:

delaying noise signals appearing on said first voltage supply structure to form a time delayed noise signal; and

coupling said delayed noise signal to said current source to oppose noise signals coupled through said first and second differential amplifiers from said first voltage supply and thereby stabilize the switching time of said first and second differential amplifiers.

15. A network for reducing variations in the current of a system coupled to a voltage supply that is subject to noise, comprising:

a first circuit having first and second terminals, said first circuit connected to receive said current from said system at said first terminal and configured to conduct said current to said second terminal, said first circuit thus also connected to receive, through said system, a first sample of said noise at said first terminal; and

a second circuit connected to couple a second sample of said noise from said voltage supply to said second terminal to oppose at least a portion of said first sample to reduce voltage variations across said first circuit and, thereby, variations in said current.

16. The network of claim 15, wherein;

said first circuit comprises a resistor; and

said second circuit comprises a capacitor.

17. A network for reducing variations in the current of a system coupled to a voltage supply that is subject to noise, comprising:

first circuit having first and second terminals, said first circuit connected to receive said current from said system at said first terminal and configured to conduct said current to said second terminal, said first circuit thus also connected to receive, through said system, a first sample of said noise at said first terminal; and

a second circuit .connected to couple a second sample of said noise from said voltage supply to said second terminal to oppose at least a portion of said first sample to reduce voltage variations across said first circuit and, thereby, variations in said current;

wherein said second circuit includes a signal delay circuit configured to provide a time delay in said noise sample.

18. A method of reducing variations in the current of a system coupled to a voltage supply that is subject to noise, comprising the steps of:

receiving said current and a first sample of said noise from said system at a first terminal of a circuit;

conducting said current through said circuit to a second terminal of said circuit; and

coupling a second sample of said noise from said voltage supply to said second terminal to oppose at least a portion of said first sample to reduce variations in the voltage across said circuit and thereby reduce variations in said current.

19. A method of reducing variations in the current of a system coupled to a voltage supply that is subject to noise, comprising the steps of;

receiving said current and a first sample of said noise from said system at a first terminal of a circuit;

conducting said current through said circuit to a second terminal of said circuit;

delaying, in time, a second sample of said noise from said voltage supply; and

coupling said time-delayed second noise sample to said second terminal to oppose at least a portion of said first noise sample to reduce variations in the voltage across said circuit and thereby reduce variations in said current.