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Floor-planning apparatus for hierarchical design of LSI

  • US 5,418,733 A
  • Filed: 02/26/1993
  • Issued: 05/23/1995
  • Est. Priority Date: 02/26/1992
  • Status: Expired due to Fees
First Claim
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1. A floor-planning apparatus for a hierarchical design of a large scale integrated circuit (LSI) comprising:

  • means for storing information regarding a logic circuit interconnection of the LSI, grouping information regarding groups of function blocks which can be functionally grouped as function units and macro information of macros used in the hierarchical design of the LSI;

    means for disposing the macros and the groups by using the macro information and the grouping information;

    display means for displaying a disposition of the macros and groups;

    means for grouping the function blocks for each function unit as macro groups according to an external request;

    means for displaying as a rats net the interconnecting relationship between the macros, groups and macro groups to achieve a better disposition thereof, upon receipt of a modifying direction;

    means for schematically interconnecting between the macro groups after the macros and the groups have been disposed;

    means for calculating a schematic wiring length between the macro groups for evaluating the wiring length of the schematic wiring; and

    means for replacing a function block at an output side of one of the macros and the macro groups connected through the schematic wiring having a length longer than a predetermined length by a function block used for high duty driving.

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