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Method for the speedup of test vector generation for digital circuits

  • US 5,418,792 A
  • Filed: 12/02/1992
  • Issued: 05/23/1995
  • Est. Priority Date: 12/02/1992
  • Status: Expired due to Term
First Claim
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1. A method for speeding up the generation of a test for detecting a set of faults in a digital circuit by dynamically varying how much effort is expended to generate the test, comprising:

  • (a) establishing an allocated test generation effort;

    (b) selecting one of the set of faults for detection;

    (c) generating a test for the purpose of successfully detecting the fault while monitoring the effort spent at generating the test;

    (d) recording the amount of effort actually-expended to generate the test, if the actually-expended effort is not greater than the allocated test generation effort amount, when a test that successfully detects the selected fault is found;

    (e) repeating the steps of (b)-(d) until a test has been found to successfully test a separate one of a prescribed number of faults in the set;

    (f) dynamically adjusting the allocated test generation effort in accordance with the highest of the recorded efforts by increasing the test generation effort when the highest of the recorded efforts is above a prescribed value and by decreasing the test generation effort when the highest of the recorded efforts is below the prescribed value;

    (g) selecting one of the faults not previously successfully detected;

    (h) generating a test for the selected fault while expending the now-adjusted allocated test generation effort, and if the test does successfully test the fault, then recording the actual test generation effort expended to generate the test;

    (i) dynamically adjusting the allocated amount of effort expended to generate a test in accordance with the recorded amount of actually-expended effort;

    (j) repeating the steps of (g)-(h) until all of the remaining faults in the set have been selected; and

    (k) increasing the test generation effort by a prescribed amount and repeating the steps of (e)-(j) until at least a predetermined number of faults have been successfully detected.

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