Method of producing a resistor in an integrated circuit

• US 5,420,063 A
• Filed: 04/11/1994
• Issued: 05/30/1995
• Est. Priority Date: 04/11/1994
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Moberly, Lawrence, Maghsoudnia, Pirouz
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): TSAI, H JEY
• Application Number:
  US08/226,129
• Time in Patent Office: 414 Days
• Field of Search: 437/918, 437/47, 437/60, 437/192, 437/186-187, 437/189-191, 437/193-195, 257/533, 257/536, 257/537, 257/904, 148/DIG. 136
• US Class Current: 438/384
• CPC Class Codes: H01L 21/32134 by liquid etching only
• CPC Class Codes: Y10S 148/136 Resistors

Abstract

The present method of forming a resistor as part of an integrated circuit includes a first masking step which blocks the resistor area of the integrated circuit from plasma etchant, with such plasma etchant meanwhile being used to define small line widths of, for example, metalization. Subsequent thereto, another layer of photoresist is applied to allow wet etching of the area of metalization above the resistor, meanwhile blocking such wet etchant from areas previously plasma etched.

Claims

1. A method of fabricating a resistor in a semiconductor device comprising:

providing a substrate having a dielectric layer thereon, the substrate having an active region;

providing a layer of resistor material on the dielectric layer;

providing a first masking layer over a portion of the layer of resistor material, the portion being located in a position removed from over the active region;

etching the layer of resistor material surrounding the portion, thereby forming a resistor;

removing the first mask layer;

providing a metal layer over the resistor and dielectric layer;

providing a second masking layer over the metal layer, the second masking layer defining an opening to the metal layer in a position removed from over the resistor;

etching the metal through the opening in the second masking layer, the second masking layer masking the metal over the resistor from said etchant;

removing the second masking layer;

providing a third masking layer over the metal layer, the third masking layer defining an opening to the metal layer over the resistor; and

etching the metal layer through the opening in the third masking layer.

2. The method of claim 1 wherein the etching of the metal layer through the opening in the second masking layer is undertaken by plasma etching.

3. The method of claim 2 wherein the etching of the metal through the opening in the third masking layer is undertaken by wet etching.

4. The method of claim 1 further providing an opening in the dielectric layer over the active region prior to providing the metal layer over the resistor and dielectric layer, so that the metal layer contacts the active region.

5. The method of claim 1 wherein the second and third masking layers are provided as photoresist layers.

6. A method of fabricating a thin film resistor in a semiconductor device comprising;

providing a substrate having a dielectric layer thereon, the substrate having an active region;

providing a layer of thin film resistor material on the dielectric layer;

providing a layer of protective material over the thin film resistor material;

forming the thin film resistor material and protective material to define configured layers thereof in a position removed from over the active region;

providing a metal layer over the configured layers of thin film resistor material and protective material and the dielectric layer;

providing a first layer of photoresist over the metal layer, the first layer of photoresist defining an opening to the metal layer in a position removed from over the configured thin film resistor material and protective material;

etching the metal through the opening in the first layer of photoresist, the first layer of photoresist blocking the metal over the configured thin film resistor material and protective material from said etchant;

removing the first layer of photoresist;

providing a second layer of photoresist over the metal layer, the second layer of photoresist defining an opening to the metal layer over the configured thin film resistor material and protective material;

etching the metal layer through the opening in the second layer of photoresist to expose a portion of the configured protective material; and

removing the second layer of photoresist.

7. The method of claim 6 wherein the protective material is TiW.

8. The method of claim 6 wherein the etching of the metal layer through the opening in the first layer of photoresist is by plasma etching, and the etching of the metal layer through the opening in the second layer of photoresist is by wet etching.

9. The method of claim 7 further comprising the step of removing a substantial portion of the TiW from over the thin film resistor material.

10. The method of claim 6 wherein the step of forming the thin film resistor material and protective material comprises providing a patterned layer of photoresist atop said layer of protective material, etching a portion of the layers of thin film resistor material and protective material, and removing said so patterned photoresist.

11. The method of claim 10 wherein the protective material is TiW.

12. A method of fabricating a resistor in a semiconductor device comprising:

providing a substrate having a dielectric layer thereon, the substrate having an active region;

providing a resistor on the dielectric layer, the resistor being located in a position removed from over the active region;

providing a first mask layer over the resistor and dielectric layer, the first mask layer defining an opening over the active region of the substrate;

etching the dielectric layer such that an opening is formed through the dielectric to the active region of the substrate;

removing the first mask layer;

providing a metal layer over the resistor and dielectric layer, the metal layer extending through the opening in the dielectric layer to contact the active region of the substrate;

providing a second masking layer over the metal layer, the second masking layer defining an opening to the metal layer in a position removed from over the resistor and from the opening in the dielectric layer;

etching the metal through the opening in the second masking layer, the second masking layer masking the metal over the resistor from said etchant;

removing the second masking layer;

providing a third masking layer over the metal layer, the third masking layer defining an opening to the metal layer over the resistor; and

etching the metal layer through the opening in the third masking layer.

13. The method of claim 12 wherein the etching of the metal layer through the opening in the first masking layer is undertaken by plasma etching.

14. The method of claim 13 wherein the etching of the metal through the opening in the second masking layer is undertaken by wet etching.

15. The method of claim 12 wherein the first and second masking layers are provided as photoresist layers.