Multiplication circuit for multiplying analog signals by digital signals
First Claim
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1. A multiplication circuit for multiplying an analog signal and a digital signal having bits comprising:
- a plurality of first capacitances arranged so as to correspond to groups in which said bits of said digital signal are classified, each said first capacitance having a capacitance value corresponding to a bit weight to be assigned to said bits of each said corresponding group;
a plurality of second capacitances arranged so as to correspond to each bit that is included in each of said corresponding groups, each said second capacitance having a capacitance values corresponding to a bit weight to be assigned to each said bit; and
a plurality of switching means for connecting said analog signal to each said first capacitance.
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Abstract
A multiplication circuit for controlling an analog input voltage by the use of a switching signal created by a digital voltage so as to either generate an analog output or to cut-off the output. A digital input signal having a plural number of bits with given weights are introduced by use of capacitive coupling, and the resulting total becomes the multiplication result.
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Citations
4 Claims
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1. A multiplication circuit for multiplying an analog signal and a digital signal having bits comprising:
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a plurality of first capacitances arranged so as to correspond to groups in which said bits of said digital signal are classified, each said first capacitance having a capacitance value corresponding to a bit weight to be assigned to said bits of each said corresponding group; a plurality of second capacitances arranged so as to correspond to each bit that is included in each of said corresponding groups, each said second capacitance having a capacitance values corresponding to a bit weight to be assigned to each said bit; and a plurality of switching means for connecting said analog signal to each said first capacitance. - View Dependent Claims (2, 3, 4)
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Specification
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Current AssigneeYOZAN, Inc.
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Original AssigneeYOZAN, Inc.
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InventorsYamamoto, Makoto, Takatori, Sunao, Shou, Guoliang, Yang, Weikang
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Primary Examiner(s)Mai, Tan V.
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Application NumberUS08/181,118Time in Patent Office502 DaysField of Search364/606, 364/602US Class Current708/7CPC Class CodesG06J 1/00 Hybrid computing arrangemen...
