Data processing system having selective data save and address translation mechanism utilizing CPU idle period

• US 5,420,996 A
• Filed: 04/25/1991
• Issued: 05/30/1995
• Est. Priority Date: 04/27/1990
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Aoyagi, Keizo
• Primary Examiner(s): Rudolph, Rebecca L.
• Assistant Examiner(s): KIM, MATTHEW M
• Application Number:
  US07/691,087
• Time in Patent Office: 1,496 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 395/425, 395/575
• US Class Current: 711/161
• CPC Class Codes: G06F 11/1441 Resetting or repowering

Abstract

A main memory has a plurality of divided storage areas. A central processing unit saves data from each storage area of the main memory into an auxiliary memory during a normal operation of a computer system, and sets a flag corresponding to each storage area, from which the data is saved, in a state indicating the end of a save operation. In addition, when data stored in the main memory is updated, the central processing unit changes the flag into a state indicating an incomplete save state. When the computer system must be stopped, the central processing unit saves data, of the data stored in the main memory, only from a storage area for which the flag indicates an incomplete save state into the auxiliary memory, thereby shortening the time required for save processing.

Claims

1. A data processing system comprising:

a main memory having a plurality of divided storage areas;

an auxiliary memory in which contents of said main memory are saved;

first save means, connected to said main memory and said auxiliary memory, and including means for saving data from each storage area of said main memory into said auxiliary memory during a normal operation of said data processing system, and means for setting save end information for storage areas, from which data is saved into said auxiliary memory, said first save means including a CPU for controlling said first save means during an idle state of the CPU;

update means, connected to said main memory, for, when data in said main memory is updated, resetting the save end information for the storage areas in which the updated data is stored; and

second save means, connected to said main memory and said auxiliary memory, for saving data in the storage areas for which the save end information is reset when said data processing system must be stopped.

2. The data processing system according to claim 1, wherein said first save means comprises means, connected to said main memory, for discriminating the storage areas for which the save end information is reset and means, connected to said main memory and auxiliary memory, for selectively saving data from storage areas discriminated by said discriminating means, into said auxiliary memory.

3. The data processing system according to claim 1, wherein said second save means comprises means for discriminating the storage areas for which the save end information is reset, and means, connected to said main memory, for selectively saving data from storage areas discriminated by said discriminating means, into said auxiliary memory.

4. The data system system according to claim 1, further comprising data write means for writing data in said main memory, and

wherein said update means includes means, connected to said main memory, for resetting the save end information for a storage area in which data is updated.

5. The data processing system according to claim 1, further comprising an address transformation table for converting a virtual address into a physical address, and wherein the

save end information is stored in said address transformation table, and said second save means checks said save end information based on contents of said address transformation table.

6. The data processing system according to claim 1, wherein said main memory comprises a table for storing the save end information for each storage area of said main memory.

7. The data processing system according to claim 1, wherein said first save means performs the save operation when a program status word indicates that the system is in the idle waiting state during performing a program.

8. A data processing system comprising:

a main memory having a plurality of divided storage areas;

an auxiliary memory in which contents of said main memory are saved;

first save means, connected to said main memory and said auxiliary memory, and including means for saving data from each storage area of said main memory into said auxiliary memory during a normal operation of said data processing system, and means for setting save end information for storage areas, from which data is saved into said auxiliary memory;

update means, connected to said main memory, for, when data in said main memory is updated, resetting the save end information for the storage areas in which the updated data is stored;

second save means, connected to said main memory and said auxiliary memory, for saving data in the storage areas for which the save end information is reset when said data processing system must be stopped; and

wherein said first save means performs the save operation when a program status word indicates that the system is in a waiting state during performing a program.

9. A computer comprising;

a main memory means for storing data in units of data blocks,

an auxiliary memory;

first save means, connected to said main memory means and said auxiliary memory, for saving the data stored in said main memory means into said auxiliary memory in units of data blocks during a normal operation of said computer, said first save means including a CPU for controlling said first save means during an idle state of the CPU; and

second save means, connected to said main memory means and said auxiliary memory, and including means for detecting data blocks, of the data stored in said main memory means, which are not saved by said first save means, and data blocks including data which is updated after the data save operation is performed by said first save means, and means for saving the detected data blocks in said auxiliary memory, when stoppage of said computer is designated.

10. The computer according to claim 9, further comprising save information storage means for storing information indicating whether each data block stored in said main memory means is saved in said auxiliary memory, and wherein

said first save means causes said save information storage means to store data indicating that the data block is saved when a given data block is saved in said auxiliary memory, and

said second save means extracts data blocks, which are not saved, based on the data stored in said save information storage means.

11. The computer according to claim 9, further comprising save information storage means for storing save information indicating whether each data block stored in said main memory means is saved in said auxiliary memory, and means for, when data stored in said main memory is updated, updating save information of a data block, to which the updated data belongs, to indicate that the data block is not saved, and wherein

said second save means extracts a data block on the basis of data stored in said save information storage means.

12. A computer system for saving data stored in a main memory into an auxiliary memory when said computer system must be stopped, wherein said computer system includes means for saving the data stored in said main memory means into said auxiliary memory during an operation time of said system and including a CPU for controlling the saving when the CPU is in an idle state, and means for saving data, of the data stored in said main memory means, which are not saved and updated after a save operation, when said computer system must be stopped.

13. The computer system according to claim 12, wherein said computer system manages the data in units of blocks.