High voltage negative charge pump with low voltage CMOS transistors
First Claim
1. A negative-voltage charge pump connected to a supply voltage, the pump having an input, an output, and a plurality of multiplier stages connected between the input and the Gattput, the pump comprising:
- (a) a discharge circuit connected between a high voltage trap node and a lesser potential discharge node at each multiplier stage; and
(b) a dual polarity switch circuit for allowing switching between positive and negative voltages, said dual polarity switch connected to at least those said discharge circuits of the last of said multiplier stages.
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Accused Products
Abstract
A system for erasing a memory array in a memory has a supply voltage and a negative charge pump. The negative charge pump system includes (a) circuitry to select a memory array to be erased; (b) for circuitry to switch on the supply voltage Vnn for the charge pump; (c) circuitry to pump the supply voltage Vnn with the charge pump to produce a pumped negative voltage; (d) circuitry to erase the selected array with the pumped negative voltage; (e) circuitry to provide the pumping; and (f) circuitry to provide a discharge path for voltages trapped in the charge pump.
53 Citations
13 Claims
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1. A negative-voltage charge pump connected to a supply voltage, the pump having an input, an output, and a plurality of multiplier stages connected between the input and the Gattput, the pump comprising:
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(a) a discharge circuit connected between a high voltage trap node and a lesser potential discharge node at each multiplier stage; and (b) a dual polarity switch circuit for allowing switching between positive and negative voltages, said dual polarity switch connected to at least those said discharge circuits of the last of said multiplier stages. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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Specification