Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells

• US 5,422,842 A
• Filed: 07/08/1993
• Issued: 06/06/1995
• Est. Priority Date: 07/08/1993
• Status: Expired due to Term

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SunDisk Corporation (Seagate Technology Holdings Plc)
• Inventors: Cernea, Raul-Adrian, Lee, Douglas J., Mehrotra, Sanjay
• Primary Examiner(s): Popek, Joseph A.
• Assistant Examiner(s): ZARABIAN, AMIR
• Application Number:
  US08/089,175
• Time in Patent Office: 698 Days
• Field of Search: 365/185, 365/189.09, 365/189.07, 365/207, 365/218, 365/168
• US Class Current: 365/185.22
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/3481 Circuits or methods to verify correct programming of nonvolatile memory cells whilst programming is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
• CPC Class Codes: G11C 16/3486 Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming

Abstract

A method and circuit programs and automatically verifies the programming of selected EEPROM cells without alternating between programming and reading modes like prior art methods and circuitry. The circuitry includes a programming circuit and a bit line voltage regulation circuit. The programming circuit further includes a novel sense amplifier which unlike prior art sense amplifiers, is operable during both cell reading and programming modes. Included in the sense amplifier are two current providing circuits. A first circuit provides current to a selected EEPROM cell which is sufficient for reading the programmed state of the cell, and a second circuit which automatically provides additional current when required, for programming the cell. The sense amplifier detects when programming of a selected EEPROM cell has completed and causes programming of that cell to be terminated. The voltage regulation circuitry regulates the bit line voltage to the selected EEPROM cell'"'"'s drain electrode. The programming circuitry, including the sense amplifier, and voltage regulation circuitry are shown to be shared between a plurality of bit lines through a bit line selection circuit.

Claims

1. A method of programming an EEPROM cell, comprising the steps of:

providing a first voltage to a control gate of said EEPROM cell, connecting a drain electrode of said EEPROM cell to a second voltage, and connecting a source electrode of said EEPROM cell to ground, wherein said first and second voltages are of sufficient magnitude to program said EEPROM cell;

sensing a current flowing between said drain and source electrodes of said EEPROM cell while said drain electrode of said EEPROM cell is connected to said second voltage, and comparing said sensed current against a reference current, wherein said reference current is greater than an expected current level for said EEPROM cell after it is programmed and less than an expected current level for said EEPROM cell before it is programmed; and

disconnecting said drain electrode of said EEPROM cell from said second voltage when said sensed current is falling and becomes less than or equal to said reference current, and generating a programming completion signal when said sensed current is falling and becomes less than or equal to said reference current.

2. A method of programming a plurality EEPROM cells, comprising the steps of:

(a) providing appropriate voltages, sufficient to program a first set of said plurality of EEPROM cells, to a control gate, a drain electrode, and a source electrode of each cell of said first set of said plurality of EEPROM cells;

(b) sensing a current flowing between said drain and source electrodes of each cell of said first set of said plurality of EEPROM cells, and comparing said sensed current for each cell of said first set of said plurality of EEPROM cells against a reference current, wherein said reference current is greater than an expected current level for each cell of said first set of plurality of EEPROM cells after each cell of said first set of plurality of EEPROM cells is programmed and less than an expected current level for each cell of said first set of plurality of EEPROM cells before each cell of said first set of plurality of EEPROM cells is programmed; and

(c) disconnecting said drain electrode of each cell of said first set of said plurality of EEPROM cells from said appropriate voltages when said sensed current for that EEPROM cell is falling and becomes less than or equal to said reference current, and generating a programming completion signal after the sensed current for all of said first set of said plurality of EEPROM cells has fallen and become less than or equal to said reference current.

3. The method as recited in claim 2, further comprising the steps of detecting said programming completion signal and repeating steps (a) to (c) for another set of a plurality of EEPROM cells following such detection.