Continuous superconductor to semiconductor converter circuit
First Claim
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1. An electrical circuit for continuously converting superconductor signal levels to semiconductor transistor signal levels, said circuit comprising:
- a capacitive bias means connected to a power supply having first and second voltage terminals, said first voltage terminal having a different voltage potential than said second voltage terminal;
a first amplifier having an input and output;
said first amplifier connected to said first and second voltage terminals;
said first amplifier input connected to a superconductor signal;
said first amplifier connected to said capacitive bias means for biasing at maximum gain; and
a first switch connected between said first amplifier output and said capacitive bias means, wherein said first switch connects said capacitive bias means to said first amplifier output when a superconductor calibration signal is used to initialize a bias voltage value that maximizes the gain of said first amplifier.
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Abstract
Apparatus for converting superconductor low level signals to semiconductor signal levels utilizing a continuous superconductor to semiconductor converter circuit biased for maximum gain and without the need for a clocked reset signal. Employing a unique biasing arrangement utilizing two capacitors and one transistor, this circuit has long term bias voltage retention and good power supply noise rejection ratio.
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Citations
17 Claims
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1. An electrical circuit for continuously converting superconductor signal levels to semiconductor transistor signal levels, said circuit comprising:
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a capacitive bias means connected to a power supply having first and second voltage terminals, said first voltage terminal having a different voltage potential than said second voltage terminal; a first amplifier having an input and output; said first amplifier connected to said first and second voltage terminals; said first amplifier input connected to a superconductor signal; said first amplifier connected to said capacitive bias means for biasing at maximum gain; and a first switch connected between said first amplifier output and said capacitive bias means, wherein said first switch connects said capacitive bias means to said first amplifier output when a superconductor calibration signal is used to initialize a bias voltage value that maximizes the gain of said first amplifier. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An electrical circuit for continuously converting superconductor signal levels to semiconductor transistor signal levels, said circuit comprising:
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first and second capacitors, said first and second capacitors connected in series and connected to a power supply having first and second voltage terminals, said first voltage terminal having a different voltage potential than said second voltage terminal; first, second and third transistors, each having a source, gate and drain; said first transistor source connected to said first voltage terminal; said first transistor drain, said second transistor drain and said third transistor drain connected together to form a first output node, wherein said first output node generates semiconductor transistor signal levels; said first transistor gate, said second transistor gate, and said third transistor source connected to the junction of said series connected first and second capacitors; said third transistor gate connected to a bias initialization control signal; and said second transistor source connected to a superconductor signal. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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Specification