Multi-channel data receiver system

• US 5,424,949 A
• Filed: 07/30/1993
• Issued: 06/13/1995
• Est. Priority Date: 07/30/1993
• Status: Expired due to Term

• Current Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Original Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Inventors: Applegate, John D., Wyberg, Bryan L., Ibis, Michael R., Helfinstine, Alan R.
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): Wieland, Susan
• Application Number:
  US08/099,794
• Time in Patent Office: 683 Days
• Field of Search: 364/424.01, 364/424.04, 364/424.06, 364/131, 395/425, 395/200, 395/800, 340/825.06, 370/85.13
• US Class Current: 701/14
• CPC Class Codes: G06F 13/122 where hardware performs an I/O function other than control of data transfer
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

The present invention is a system that is used on board an aircraft that receives data, examines the data, and directs the data to appropriate memory devices for future use. A plurality of receivers are coupled to a serial data bus for selectively receiving a sequence of data messages on the data bus. Each of the receivers includes a data register for storing one of the sequential flow of data messages. In turn the receiver provides a data ready signal so that a sequencer can selectively read the data messages from the receiver and either store them in one of a plurality of receivers, or discard the information.

Claims

1. A multichannel data receiver system for distributing data messages received on a data bus to a plurality of like-kind information memory devices, where said data messages have a fixed word bit length in which a plurality of bits define a label word indicating the subsystem origin of said data message, and the remainder bits define an information data word, said multi-channel data receiver system comprising:

a plurality of receivers each coupled to said serial data bus for receiving selected ones of a sequence of data messages on said data bus, and each including a data register for storing one of said sequence of data messages, each of said receivers including means for providing a data ready signal indicative that a data message has been stored in a corresponding data register of one of said receivers;

a random access memory means for storing data words;

a data signal processor coupled to said random access memory means for selectively erasing data words stored in said random access memory and storing selected data words in said random access memory in response to selected conditions;

a plurality of secondary memory devices for storing data messages having the same label word; and

a sequencer means which sequentially and cyclically examines the contents of said data register of each of said plurality of receivers for determining the presence or absence of a match of said the label word of said data message stored in said receiver data register and any one of said data words stored in the said random access memory means, said sequencer means further including means for selectively storing said data messages of like-kind information having identical label words in a selected one of said plurality of secondary memory devices upon a match of said label word with one of said random access data words, and resetting said receiver data register upon an absence of a match of said label word with any one of said random access data words.

2. A multichannel data receiver system for an aircraft having a data bus for receiving data messages and distributing said data messages to a plurality of like-kind information memory devices, where said data messages have a fixed word bit length in which a plurality of bits define a label word indicating the subsystem origin of said data message, and the remainder bits define an information data word, said multi-channel data receiver system comprising:

a plurality of receivers each coupled to said serial data bus for receiving selected ones of a sequence of data messages on said data bus, and each including a data register for storing one of said sequence of data messages, each of said receivers including means for providing a data ready signal indicative that a data message has been stored in a corresponding data register of one of said receivers;

a random access memory means for storing data words;

a data signal processor coupled to said random access memory means for selectively erasing data words stored in said random access memory and storing selected data words in said random access memory in response to phases of flight of said aircraft;

a plurality of secondary memory devices for storing data messages having the same label word; and

a sequencer means which sequentially and cyclically examines the contents of said data register of each of said plurality of receivers for determining the presence or absence of a match of said the label word of said data message stored in said receiver data register and any one of said data words stored in the said random access memory means, said sequencer means further including means for selectively storing said data messages of like-kind information having identical label words in a selected one of said plurality of secondary memory devices upon a match of said label word with one of said random access data words, and resetting said receiver data register upon an absence of a match of said label word with any one of said random access data words.