Microstructures and high temperature isolation process for fabrication thereof

• US 5,426,070 A
• Filed: 05/26/1993
• Issued: 06/20/1995
• Est. Priority Date: 05/26/1993
• Status: Expired due to Term

• Current Assignee: Cornell Research Foundation Incorporated (Cornell University)
• Original Assignee: Cornell Research Foundation Incorporated (Cornell University)
• Inventors: Shaw, Kevin A., MacDonald, Noel C., Zhang, Z. Lisa
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): MULPURI, SAVITRI
• Application Number:
  US08/067,089
• Time in Patent Office: 755 Days
• Field of Search: 437/901, 437/921, 437/203, 437/228, 437/919, 148/DIG. 159, 148/DIG. 50
• US Class Current: 216/2
• CPC Class Codes: B81C 1/0015 Cantilevers switches using MEMS H01H1/0036; electrostatic relays using micromechanics H01H59/0009; microelectro-mechanical resonators H03H9/02244
• CPC Class Codes: G01P 15/0802 Details

Abstract

A method of fabricating released microelectromechanical and microoptomechanical structures having electrically isolating segments from single crystal silicon includes thermal oxidation steps. The structures are defined using a single mask patterning process, and the structure is partially thermally oxidized. This is followed by a second masking step which is used to define segments to be completely thermally oxidized, and a second oxidation step completes the fabrication of the isolating segment. Thereafter the structure is released from the underlying substrate.

Claims

1. A reactive ion etching process for fabricating a high aspect ratio, submicron, released single crystal structure having an electrically isolating segment, comprising:

forming a first mask layer on a top surface of a single crystal silicon substrate;

patterning said first mask layer to produce a first mask defining a single crystal silicon structure of arbitrary shape to be formed in and surrounded by said substrate, said shape being independent of crystal orientation in said substrate and including at least a beam portion to be released, said patterning step including producing in said first mask a shape of an electrically isolating region for said structure of arbitrary shape;

reactive ion etching said substrate through the pattern defined by said first mask to produce corresponding deep trenches in said substrate surrounding the defined structure of arbitrary shape, said structure having a top surface covered by said first mask and having substantially vertical side walls;

initially thermally oxidizing said defined structure to produce a thermal oxide layer on said walls and on the bottom of said deep trenches, the thermal oxide layer extending at least partially through said single crystal silicon in said isolating region;

producing a second mask surrounding the isolating region;

stripping the thermal oxide from said side walls in the isolating region;

removing the second mask;

subsequently thermally oxidizing said defined structure to increase the thickness of said thermal oxide layer surrounding said isolating region and completely oxidizing the remaining silicon in said isolating region;

removing the thermal oxide layer from the floor of said trenches to expose said single crystal substrate; and

releasing at least said beam portion from its underlying substrate by reactive ion etching said exposed single crystal substrate in said trenches.

2. The process of claim 1, wherein the releasing step includes isotropically etching said substrate.

3. The process of claim 1, further including reactive ion etching said exposed single crystal substrate at the bottom of said trenches to deepen trenches prior to said releasing step.

4. The process of claim 3, wherein the step of releasing said beam portion includes isotropically etching said substrate in a reactive ion etch.

5. The process of claim 4, further including the step of coating said defined structure and surrounding substrate with a metal layer by depositing metal at least on said top surface mask and on said side wall oxide of said defined structure and surrounding substrate, and on the bottom of said trench.

6. The process of claim 5, wherein the step of isotropically etching said substrate includes undercutting said surrounding substrate to prevent continuous deposition of metal between said sidewalls and the bottom of said trenches.

7. The process of claim 1, wherein the step of producing the shape of an electrically isolating region in said first mask includes providing a mask shape which defines a structural shape of reduced cross-sectional dimensions at least in a beam portion of the structure.

8. The process of claim 7, wherein the step of initially thermally oxidizing said defined structure produces an oxide layer extending through a substantial portion of said isolating region.

9. The process of claim 1, wherein the step of forming said first mask layer includes depositing a dielectric material on said top surface.

10. The process of claim 1, wherein the step of forming said first mask layer includes depositing a dielectric oxide material.

11. A reactive ion etching process for fabricating a submicron released single crystal structure having an electrically isolating segment, comprising:

producing in a first mask layer on a single crystal substrate a pattern for a structure to be released, the pattern defining an electrically isolating region for the structure;

producing deep trenches in said substrate through said mask layer, the trenches surrounding and defining the structure to be released;

thermally oxidizing said defined structure to be released to completely oxidize said electrically isolating region while only partially oxidizing the remainder of said defined structure; and

releasing said defined structure and oxidized electrically isolating region.